Searched refs:mmCP_HQD_HQ_CONTROL1 (Results 1 - 7 of 7) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h669 #define mmCP_HQD_HQ_CONTROL1 0x3269 macro
H A Dgfx_8_1_d.h669 #define mmCP_HQD_HQ_CONTROL1 0x3269 macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h5379 #define mmCP_HQD_HQ_CONTROL1 0x1fcd macro
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H A Dgc_10_3_0_offset.h5012 #define mmCP_HQD_HQ_CONTROL1 0x1fcd macro
[all...]
H A Dgc_9_0_offset.h2895 #define mmCP_HQD_HQ_CONTROL1 0x1269 macro
H A Dgc_9_1_offset.h3123 #define mmCP_HQD_HQ_CONTROL1 0x1269 macro
H A Dgc_9_2_1_offset.h3079 #define mmCP_HQD_HQ_CONTROL1 0x1269 macro

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