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e3569fab |
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14-Jun-2020 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers Forgot to subtract the SOC15 IP offsetand add the BASE_IDX values. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8d7fb7a1 |
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11-Jun-2020 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits Even though they are technically MMIO registers I put the bits with the sqind block for organizational purposes. Requested for UMR debugging. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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055e23e3 |
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09-Jun-2020 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2) Requested for UMR support. (v2): Also add reg/bits for gfx9 headers Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6c33a6f4 |
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25-Mar-2020 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own header The register is part of the PWR block not the GC block. Move to its own header. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1f02c97b |
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20-Mar-2020 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Add GFX9.1 PWR_MISC_CNTL_STATUS register to headers The registers are needed for umr and not in the headers. I left them in the gfx_v9_0.c since it includes 9.0 and 9.4 headers and including 9.1 headers would result in a lot of duplicate registers clashing. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e466c293 |
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08-Dec-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: remove some old gc 9.x registers Leftover from bring up. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5a18155d |
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27-Nov-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/include:cleanup raven1 gc header files. Cleanup asic_reg/raven1/GC folder. Remove unused files: gc_9_1_default.h gc_9_1_sh_mask.h Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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