/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hubp.c | 599 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); 908 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start);
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H A D | dcn10_hw_sequencer_debug.c | 261 pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start,
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_hubp.c | 94 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); 1143 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); 1447 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); 1462 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) 1464 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_hubp.c | 361 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); 376 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) 378 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | display_rq_dlg_calc_20.c | 945 disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2)); 946 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); 960 dml_print("DML_DLG: %s: disp_dlg_regs->min_dst_y_next_start = 0x%0x\n", 962 disp_dlg_regs->min_dst_y_next_start);
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H A D | display_rq_dlg_calc_20v2.c | 945 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start 947 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); 961 dml_print("DML_DLG: %s: disp_dlg_regs->min_dst_y_next_start = 0x%0x\n", 963 disp_dlg_regs->min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
H A D | display_rq_dlg_calc_21.c | 991 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); 992 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); 1011 "DML_DLG: %s: disp_dlg_regs->min_dst_y_next_start = 0x%0x\n", 1013 disp_dlg_regs->min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
H A D | display_rq_dlg_calc_30.c | 1056 disp_dlg_regs->min_dst_y_next_start = (unsigned int)(((double)dlg_vblank_start 1058 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); 1072 dml_print("DML_DLG: %s: disp_dlg_regs->min_dst_y_next_start = 0x%0x\n", 1074 disp_dlg_regs->min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | display_rq_dlg_calc_31.c | 989 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); 991 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); 994 dml_print("DML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); 999 //old_impl_vs_vba_impl("min_dst_y_next_start", dlg_vblank_start, vba__min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
H A D | display_rq_dlg_calc_314.c | 1076 disp_dlg_regs->min_dst_y_next_start = vba__min_dst_y_next_start * dml_pow(2, 2); 1078 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); 1081 dml_print("DML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); 1086 //old_impl_vs_vba_impl("min_dst_y_next_start", dlg_vblank_start, vba__min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | display_rq_dlg_calc_32.c | 229 unsigned int min_dst_y_next_start; local 280 min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); 283 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); 441 dlg_regs->min_dst_y_next_start = min_dst_y_next_start * dml_pow(2, 2); 442 ASSERT(dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18));
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | display_mode_structs.h | 622 unsigned int min_dst_y_next_start; member in struct:_vcs_dpi_display_dlg_regs_st
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H A D | display_mode_vba.c | 183 dml_get_pipe_attr_func(min_dst_y_next_start, mode_lib->vba.MIN_DST_Y_NEXT_START);
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H A D | display_mode_vba.h | 143 dml_get_pipe_attr_decl(min_dst_y_next_start); variable
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H A D | display_rq_dlg_helpers.c | 202 "DML_RQ_DLG_CALC: min_dst_y_next_start = 0x%0x\n", 203 dlg_regs->min_dst_y_next_start);
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H A D | dml1_display_rq_dlg_calc.c | 1175 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start 1177 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); 1187 "DLG: %s: disp_dlg_regs->min_dst_y_next_start = 0x%0x", 1189 disp_dlg_regs->min_dst_y_next_start);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | display_mode_core.c | 10299 dml_get_per_surface_var_func(min_dst_y_next_start, dml_uint_t, mode_lib->mp.MIN_DST_Y_NEXT_START);
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H A D | display_mode_core.h | 183 dml_get_per_surface_var_decl(min_dst_y_next_start, dml_uint_t);
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H A D | display_mode_core_structs.h | 1873 dml_uint_t min_dst_y_next_start; member in struct:_vcs_dpi_dml_display_dlg_regs_st
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H A D | display_mode_util.c | 255 dml_print("DML: min_dst_y_next_start = 0x%x\n", dlg_regs->min_dst_y_next_start);
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H A D | dml2_translation_helper.c | 1219 out->dlg_regs.min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start;
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H A D | dml_display_rq_dlg_calc.c | 267 dml_uint_t min_dst_y_next_start; local 323 min_dst_y_next_start = (dml_uint_t)(dml_get_min_dst_y_next_start(mode_lib, pipe_idx)); 326 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); 411 disp_dlg_regs->min_dst_y_next_start = (dml_uint_t)((dml_float_t) min_dst_y_next_start * dml_pow(2, 2)); 412 ASSERT(disp_dlg_regs->min_dst_y_next_start < (dml_uint_t)dml_pow(2, 18));
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
H A D | dcn10_hwseq.c | 245 pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start,
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
H A D | dcn20_hwseq.c | 2350 pipe_ctx->dlg_regs.min_dst_y_next_start);
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