Searched refs:max_dac2_clock_8 (Results 1 - 19 of 19) sorted by relevance

/haiku/src/add-ons/accelerants/skeleton/
H A DGetModeInfo.c65 max_pclk = si->ps.max_dac2_clock_8;
125 max_pclk = si->ps.max_dac2_clock_8;
H A DProposeDisplayMode.c416 max_vclk = si->ps.max_dac2_clock_8;
/haiku/src/add-ons/accelerants/via/
H A DGetModeInfo.c65 max_pclk = si->ps.max_dac2_clock_8;
125 max_pclk = si->ps.max_dac2_clock_8;
H A DProposeDisplayMode.c418 max_vclk = si->ps.max_dac2_clock_8;
/haiku/src/add-ons/accelerants/nvidia/
H A DGetModeInfo.c65 max_pclk = si->ps.max_dac2_clock_8;
125 max_pclk = si->ps.max_dac2_clock_8;
H A DProposeDisplayMode.c466 max_vclk = si->ps.max_dac2_clock_8;
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_info.c165 si->ps.max_dac2_clock_8 = (pins[37] << 8) | pins[36];//testclk
295 si->ps.max_dac2_clock_8 = 0;
432 si->ps.max_dac2_clock_8 = 0;
546 si->ps.max_dac2_clock_8 = 0;
641 si->ps.max_dac2_clock_8 = 0;
680 si->ps.max_dac2_clock_8 = 0;
720 si->ps.max_dac2_clock_8 = 0;
761 si->ps.max_dac2_clock_8 = 0;
801 si->ps.max_dac2_clock_8 = 0;
842 si->ps.max_dac2_clock_8
[all...]
/haiku/src/add-ons/accelerants/matrox/
H A DGetModeInfo.c71 max_pclk = si->ps.max_dac2_clock_8;
H A DProposeDisplayMode.c299 max_vclk = si->ps.max_dac2_clock_8;
/haiku/src/add-ons/accelerants/via/engine/
H A Dinfo.c700 si->ps.max_dac2_clock_8 = 0;
734 si->ps.max_dac2_clock_8 = 0;
768 si->ps.max_dac2_clock_8 = 0;
807 si->ps.max_dac2_clock_8 = 200;
819 si->ps.max_dac2_clock_8 = 350;
856 si->ps.max_dac2_clock_8 = 350;
906 si->ps.max_dac2_clock_8 = 350;
1055 LOG(2,("max_dac2_clock_8: %dMhz\n", si->ps.max_dac2_clock_8));
H A Ddac2.c261 max_pclk = si->ps.max_dac2_clock_8;
/haiku/headers/private/graphics/matrox/
H A DDriverInterface.h218 uint32 max_dac2_clock_8; /* dac2, maven limits correlated to RAMspeed limits (Mhz) */ member in struct:__anon785::__anon789
/haiku/headers/private/graphics/skeleton/
H A DDriverInterface.h272 uint32 max_dac2_clock_8; /* dac2, maven limits correlated to RAMspeed limits (Mhz) */ member in struct:__anon937::__anon943
/haiku/src/add-ons/accelerants/skeleton/engine/
H A Ddac2.c261 max_pclk = si->ps.max_dac2_clock_8;
H A Dinfo.c2631 si->ps.max_dac2_clock_8 = 0;
2665 si->ps.max_dac2_clock_8 = 0;
2699 si->ps.max_dac2_clock_8 = 0;
2738 si->ps.max_dac2_clock_8 = 200;
2750 si->ps.max_dac2_clock_8 = 350;
2787 si->ps.max_dac2_clock_8 = 350;
2837 si->ps.max_dac2_clock_8 = 350;
3038 LOG(2,("max_dac2_clock_8: %dMhz\n", si->ps.max_dac2_clock_8));
/haiku/headers/private/graphics/via/
H A DDriverInterface.h283 uint32 max_dac2_clock_8; /* dac2, maven limits correlated to RAMspeed limits (Mhz) */ member in struct:__anon7::__anon10
/haiku/headers/private/graphics/nvidia/
H A DDriverInterface.h412 uint32 max_dac2_clock_8; /* dac2, maven limits correlated to RAMspeed limits (Mhz) */ member in struct:__anon21::__anon27
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_dac2.c301 max_pclk = si->ps.max_dac2_clock_8;
H A Dnv_info.c2987 si->ps.max_dac2_clock_8 = 0;
3021 si->ps.max_dac2_clock_8 = 0;
3055 si->ps.max_dac2_clock_8 = 0;
3094 si->ps.max_dac2_clock_8 = 200;
3106 si->ps.max_dac2_clock_8 = 350;
3143 si->ps.max_dac2_clock_8 = 350;
3208 si->ps.max_dac2_clock_8 = 350;
3382 LOG(2,("max_dac2_clock_8: %dMhz\n", si->ps.max_dac2_clock_8));

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