/u-boot/arch/arm/include/asm/arch-omap3/ |
H A D | dss.h | 42 u32 irqstatus; /* 0x18 */ member in struct:dss_regs 55 u32 irqstatus; /* 0x18 */ member in struct:dispc_regs
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/u-boot/arch/arm/mach-omap2/ |
H A D | mem-common.c | 169 writel(0x00000000, &gpmc_cfg->irqstatus);
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/u-boot/drivers/mtd/nand/raw/ |
H A D | omap_elm.c | 112 while ((readl(&elm_cfg->irqstatus) & (0x1 << poly)) != 0x1) 115 writel((readl(&elm_cfg->irqstatus) | (0x1 << poly)), 116 &elm_cfg->irqstatus);
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H A D | omap_elm.h | 62 u32 irqstatus; /* 0x018 */ member in struct:elm
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/u-boot/drivers/ram/k3-ddrss/ |
H A D | lpddr4.c | 52 bool irqstatus = false; local 59 result = lpddr4_checkctlinterrupt(pd, irqbit, &irqstatus); 60 } while ((irqstatus == (bool)false) && (result == (u32)0)); 69 bool irqstatus = false; local 76 result = lpddr4_checkphyindepinterrupt(pd, irqbit, &irqstatus); 77 } while ((irqstatus == (bool)false) && (result == (u32)0)); 473 u32 lpddr4_checkphyindepinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrupt intr, bool *irqstatus) argument 478 result = LPDDR4_INTR_CheckPhyIndepIntSF(pd, intr, irqstatus); 483 *irqstatus = (bool)(((phyindepirqstatus >> (u32)intr) & LPDDR4_BIT_MASK) > 0U);
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H A D | lpddr4_am6x.c | 168 u32 lpddr4_checkctlinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr, bool *irqstatus) argument 175 result = LPDDR4_INTR_CheckCtlIntSF(pd, intr, irqstatus); 186 *irqstatus = true; 189 *irqstatus = true; 191 *irqstatus = false;
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H A D | lpddr4_am6x_sanity.h | 19 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus); 21 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus); 29 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus) argument 35 } else if (irqstatus == NULL) { 163 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus) argument 169 } else if (irqstatus == NULL) {
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H A D | lpddr4_if.h | 108 u32 lpddr4_checkctlinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr, bool *irqstatus); 116 u32 lpddr4_checkphyindepinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrupt intr, bool *irqstatus);
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H A D | lpddr4_j721e.c | 74 u32 lpddr4_checkctlinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr, bool *irqstatus) argument 80 result = LPDDR4_INTR_CheckCtlIntSF(pd, intr, irqstatus); 94 *irqstatus = true; 96 *irqstatus = false;
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H A D | lpddr4_j721e_sanity.h | 16 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus); 18 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus); 26 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus) argument 32 } else if (irqstatus == NULL) { 148 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus) argument 154 } else if (irqstatus == NULL) {
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H A D | lpddr4_obj_if.h | 45 u32 (*checkctlinterrupt)(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr, bool *irqstatus); 53 u32 (*checkphyindepinterrupt)(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrupt intr, bool *irqstatus);
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/u-boot/drivers/video/ti/ |
H A D | tilcdc.c | 100 u32 irqstatus; member in struct:tilcdc_regs
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/u-boot/include/linux/mtd/ |
H A D | omap_gpmc.h | 64 u32 irqstatus; /* 0x18 */ member in struct:gpmc
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/u-boot/include/ |
H A D | omap3_spi.h | 64 unsigned int irqstatus; /* 0x18 */ member in struct:mcspi
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