Searched refs:intel_de_write_fw (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_sprite.c103 intel_de_write_fw(dev_priv, SPCSCYGOFF(plane_id),
105 intel_de_write_fw(dev_priv, SPCSCCBOFF(plane_id),
107 intel_de_write_fw(dev_priv, SPCSCCROFF(plane_id),
110 intel_de_write_fw(dev_priv, SPCSCC01(plane_id),
112 intel_de_write_fw(dev_priv, SPCSCC23(plane_id),
114 intel_de_write_fw(dev_priv, SPCSCC45(plane_id),
116 intel_de_write_fw(dev_priv, SPCSCC67(plane_id),
118 intel_de_write_fw(dev_priv, SPCSCC8(plane_id), SPCSC_C0(csc[8]));
120 intel_de_write_fw(dev_priv, SPCSCYGICLAMP(plane_id),
122 intel_de_write_fw(dev_pri
[all...]
H A Dskl_universal_plane.c564 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0),
566 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1),
568 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 2),
570 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 3),
572 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 4),
574 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 5),
577 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 0),
579 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 1),
581 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 2),
583 intel_de_write_fw(dev_pri
[all...]
H A Dintel_gmbus.c381 intel_de_write_fw(i915, GMBUS4(i915), irq_en);
390 intel_de_write_fw(i915, GMBUS4(i915), 0);
412 intel_de_write_fw(i915, GMBUS4(i915), irq_enable);
416 intel_de_write_fw(i915, GMBUS4(i915), 0);
447 intel_de_write_fw(i915, GMBUS0(i915),
451 intel_de_write_fw(i915, GMBUS1(i915),
472 intel_de_write_fw(i915, GMBUS0(i915), gmbus0_reg);
529 intel_de_write_fw(i915, GMBUS3(i915), val);
530 intel_de_write_fw(i915, GMBUS1(i915),
540 intel_de_write_fw(i91
[all...]
H A Di9xx_plane.c425 intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
439 intel_de_write_fw(dev_priv, DSPPOS(i9xx_plane),
441 intel_de_write_fw(dev_priv, DSPSIZE(i9xx_plane),
471 intel_de_write_fw(dev_priv, PRIMPOS(i9xx_plane),
473 intel_de_write_fw(dev_priv, PRIMSIZE(i9xx_plane),
475 intel_de_write_fw(dev_priv, PRIMCNSTALPHA(i9xx_plane), 0);
479 intel_de_write_fw(dev_priv, DSPOFFSET(i9xx_plane),
482 intel_de_write_fw(dev_priv, DSPLINOFF(i9xx_plane),
484 intel_de_write_fw(dev_priv, DSPTILEOFF(i9xx_plane),
493 intel_de_write_fw(dev_pri
[all...]
H A Dintel_dsb.c372 intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id),
375 intel_de_write_fw(dev_priv, DSB_CHICKEN(pipe, dsb->id),
378 intel_de_write_fw(dev_priv, DSB_HEAD(pipe, dsb->id),
386 intel_de_write_fw(dev_priv, DSB_PMCTRL(pipe, dsb->id),
395 intel_de_write_fw(dev_priv, DSB_PMCTRL_2(pipe, dsb->id),
400 intel_de_write_fw(dev_priv, DSB_TAIL(pipe, dsb->id),
428 intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id),
444 intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id), 0);
H A Dskl_scaler.c660 intel_de_write_fw(dev_priv, GLK_PS_COEF_INDEX_SET(pipe, id, set),
673 intel_de_write_fw(dev_priv, GLK_PS_COEF_DATA_SET(pipe, id, set),
677 intel_de_write_fw(dev_priv, GLK_PS_COEF_INDEX_SET(pipe, id, set), 0);
750 intel_de_write_fw(dev_priv, SKL_PS_CTRL(pipe, id), ps_ctrl);
752 intel_de_write_fw(dev_priv, SKL_PS_VPHASE(pipe, id),
754 intel_de_write_fw(dev_priv, SKL_PS_HPHASE(pipe, id),
756 intel_de_write_fw(dev_priv, SKL_PS_WIN_POS(pipe, id),
758 intel_de_write_fw(dev_priv, SKL_PS_WIN_SZ(pipe, id),
813 intel_de_write_fw(dev_priv, SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
814 intel_de_write_fw(dev_pri
[all...]
H A Dintel_color.c213 intel_de_write_fw(i915, PIPE_CSC_PREOFF_HI(pipe), csc->preoff[0]);
214 intel_de_write_fw(i915, PIPE_CSC_PREOFF_ME(pipe), csc->preoff[1]);
215 intel_de_write_fw(i915, PIPE_CSC_PREOFF_LO(pipe), csc->preoff[2]);
217 intel_de_write_fw(i915, PIPE_CSC_COEFF_RY_GY(pipe),
219 intel_de_write_fw(i915, PIPE_CSC_COEFF_BY(pipe),
222 intel_de_write_fw(i915, PIPE_CSC_COEFF_RU_GU(pipe),
224 intel_de_write_fw(i915, PIPE_CSC_COEFF_BU(pipe),
227 intel_de_write_fw(i915, PIPE_CSC_COEFF_RV_GV(pipe),
229 intel_de_write_fw(i915, PIPE_CSC_COEFF_BV(pipe),
235 intel_de_write_fw(i91
[all...]
H A Dintel_cursor.c296 intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), 0);
297 intel_de_write_fw(dev_priv, CURBASE(PIPE_A), base);
298 intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);
299 intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
300 intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), cntl);
306 intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
509 intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0);
526 intel_de_write_fw(dev_priv, CURPOS_ERLY_TPT(pipe), val);
529 intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id),
592 intel_de_write_fw(dev_pri
[all...]
H A Dintel_de.h108 intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val) function
H A Dintel_fbc.c328 intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane),
365 intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
H A Dintel_dmc.c512 intel_de_write_fw(i915,
H A Dintel_display.c809 intel_de_write_fw(dev_priv, PF_CTL(pipe), PF_ENABLE |
812 intel_de_write_fw(dev_priv, PF_CTL(pipe), PF_ENABLE |
814 intel_de_write_fw(dev_priv, PF_WIN_POS(pipe),
816 intel_de_write_fw(dev_priv, PF_WIN_SZ(pipe),
1740 intel_de_write_fw(dev_priv, PF_CTL(pipe), 0);
1741 intel_de_write_fw(dev_priv, PF_WIN_POS(pipe), 0);
1742 intel_de_write_fw(dev_priv, PF_WIN_SZ(pipe), 0);
H A Dskl_watermark.c2370 intel_de_write_fw(i915, reg,
2374 intel_de_write_fw(i915, reg, 0);
2390 intel_de_write_fw(i915, reg, val);

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