Searched refs:htotal (Results 1 - 25 of 295) sorted by relevance

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/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Dif0013.h31 __u16 htotal; member in struct:nvif_head_scanoutpos_args::nvif_head_scanoutpos_v0
/linux-master/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_dsi_encoder.c51 hsync_start_x = (mode->htotal - mode->hsync_start);
52 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
54 vsync_period = mode->vtotal * mode->htotal;
55 vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
56 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dsi_hsync_skew;
57 display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dsi_hsync_skew - 1;
61 MDP4_DSI_HSYNC_CTRL_PERIOD(mode->htotal));
H A Dmdp4_dtv_encoder.c55 hsync_start_x = (mode->htotal - mode->hsync_start);
56 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
58 vsync_period = mode->vtotal * mode->htotal;
59 vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
60 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew;
61 display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_skew - 1;
65 MDP4_DTV_HSYNC_CTRL_PERIOD(mode->htotal));
H A Dmdp4_lcdc_encoder.c229 hsync_start_x = (mode->htotal - mode->hsync_start);
230 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
232 vsync_period = mode->vtotal * mode->htotal;
233 vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
234 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + lcdc_hsync_skew;
235 display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + lcdc_hsync_skew - 1;
239 MDP4_LCDC_HSYNC_CTRL_PERIOD(mode->htotal));
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_vblank.c46 * pixel counter = vblank_start * htotal pixel counter = 0 (gen3/4)
73 u32 pixel, vbl_start, hsync_start, htotal; local
90 htotal = mode->crtc_htotal;
97 vbl_start *= htotal;
100 vbl_start -= htotal - hsync_start;
138 u32 htotal = mode->crtc_htotal; local
168 clock), 1000 * htotal);
306 int vbl_start, vbl_end, hsync_start, htotal, vtotal; local
319 htotal = mode->crtc_htotal;
372 vbl_start *= htotal;
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H A Dintel_tv.c322 u16 hblank_start, hblank_end, htotal; member in struct:tv_mode
396 .hblank_start = 836, .htotal = 857,
438 .hblank_start = 836, .htotal = 857,
481 .hblank_start = 836, .htotal = 857,
524 .hblank_start = 836, .htotal = 857,
567 .hblank_start = 844, .htotal = 863,
612 .hblank_start = 844, .htotal = 863,
654 .hblank_start = 842, .htotal = 857,
678 .hblank_start = 859, .htotal = 863,
702 .hblank_start = 1580, .htotal
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/linux-master/drivers/gpu/drm/amd/display/modules/power/
H A Dpower_helpers.h62 uint16_t vtotal, uint16_t htotal);
/linux-master/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_encoder.c73 hsync_start_x = (mode->htotal - mode->hsync_start);
74 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
76 vsync_period = mode->vtotal * mode->htotal;
77 vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
78 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew;
79 display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_skew - 1;
87 display_v_start += mode->htotal - mode->hsync_start;
95 MDP5_INTF_HSYNC_CTL_PERIOD(mode->htotal));
/linux-master/drivers/gpu/drm/panel/
H A Dpanel-simple.c772 .htotal = 1280 + 40 + 80 + 40,
798 .htotal = 480 + 2 + 41 + 2,
822 .htotal = 800 + 0 + 255 + 0,
932 .htotal = 1024 + 156 + 8 + 156,
957 .htotal = 1366 + 20 + 70,
980 .htotal = 1366 + 40 + 40 + 32,
1040 .htotal = 1280 + 82 + 2 + 84,
1064 .htotal = 800 + 40 + 216 + 128,
1173 .htotal = 1560,
1286 .htotal
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H A Dpanel-arm-versatile.c141 .htotal = 320 + 6 + 6 + 6,
164 .htotal = 640 + 24 + 96 + 24,
186 .htotal = 176 + 2 + 3 + 3,
209 .htotal = 240 + 10 + 10 + 20,
H A Dpanel-edp.c1013 .htotal = 1366 + 48 + 32 + 10,
1041 .htotal = 1920 + 58 + 42 + 60,
1068 .htotal = 1920 + 172 + 80 + 60,
1095 .htotal = 1366 + 48 + 32 + 20,
1117 .htotal = 1920 + 16 + 16 + 152,
1145 .htotal = 1280 + 48 + 32 + 80,
1156 .htotal = 1280 + 48 + 32 + 80,
1186 .htotal = 2160 + 48 + 32 + 100,
1198 .htotal = 2160 + 48 + 32 + 100,
1229 .htotal
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H A Dpanel-tpo-tpg110.c109 .htotal = 800 + 40 + 1 + 216,
125 .htotal = 640 + 24 + 1 + 136,
141 .htotal = 480 + 2 + 1 + 43,
157 .htotal = 480 + 2 + 1 + 43,
173 .htotal = 400 + 20 + 1 + 108,
/linux-master/drivers/video/fbdev/geode/
H A Ddisplay_gx.c61 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; local
134 htotal = hblankend;
144 ((htotal - 1) << 16));
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Duhead.c57 args->v0.htotal = head->arm.htotal;
61 /* We don't support reading htotal/vtotal on pre-NV50 VGA,
65 if (!args->v0.vtotal || !args->v0.htotal)
H A Dhead.h15 u16 htotal; member in struct:nvkm_head::nvkm_head_state
/linux-master/drivers/video/fbdev/core/
H A Dfbcvt.c44 u32 htotal; member in struct:fb_cvt_data
132 hsync = (FB_CVT_CELLSIZE * cvt->htotal)/100;
177 pixclock = (cvt->f_refresh * cvt->vtotal * cvt->htotal)/1000;
179 pixclock = (cvt->htotal * 1000000)/cvt->hperiod;
354 cvt.htotal = cvt.active_pixels + cvt.hblank;
357 cvt.hfreq = cvt.pixclock/cvt.htotal;
H A Dfbmon.c722 int vtotal, htotal; local
734 htotal = mode->xres + mode->right_margin + mode->hsync_len
745 hscan = (pixclock + htotal / 2) / htotal;
1024 u32 htotal; member in struct:__fb_timings
1063 * duty cycle = percent of htotal assigned to inactive display
1096 * duty cycle = percent of htotal assigned to inactive display
1155 timings->htotal = timings->hactive + timings->hblank;
1156 timings->dclk = timings->htotal * timings->hfreq;
1166 timings->htotal
1314 unsigned int htotal, vtotal, total; local
1436 u32 hfreq, vfreq, htotal, vtotal, pixclock; local
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/linux-master/drivers/media/i2c/
H A Dths8200.c61 static inline unsigned htotal(const struct v4l2_bt_timings *t) function
252 ths8200_write(sd, THS8200_DTG1_SPEC_G_LSB, (htotal(bt)/2) & 0xff);
254 ((htotal(bt)/2) >> 8) & 0x0f);
257 ths8200_write(sd, THS8200_DTG1_TOT_PIXELS_MSB, htotal(bt) >> 8);
258 ths8200_write(sd, THS8200_DTG1_TOT_PIXELS_LSB, htotal(bt) & 0xff);
308 (htotal(bt) >> 8) & 0x1f);
309 ths8200_write(sd, THS8200_DTG2_HLENGTH_HDLY_LSB, htotal(bt));
356 "vertical: sync %d\n", __func__, htotal(bt), vtotal(bt),
/linux-master/drivers/gpu/drm/tests/
H A Ddrm_modes_test.c63 KUNIT_EXPECT_EQ(test, mode->htotal, 858);
110 KUNIT_EXPECT_EQ(test, mode->htotal, 864);
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c852 unsigned int htotal = dst->htotal; local
977 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal
988 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
1044 line_time_in_us = (htotal / pclk_freq_in_mhz);
1079 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
1086 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
1120 dml_print("DML_DLG: %s: htotal = %d\n", __func__, htotal);
1166 if (htotal <
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20v2.c806 unsigned int htotal = dst->htotal; local
931 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal
942 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
993 line_time_in_us = (htotal / pclk_freq_in_mhz);
1040 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
1047 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
1078 dml_print("DML_DLG: %s: htotal = %d\n", __func__, htotal);
1117 if (htotal <
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H A Ddisplay_rq_dlg_calc_20.c806 unsigned int htotal = dst->htotal; local
931 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal
942 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
992 line_time_in_us = (htotal / pclk_freq_in_mhz);
1039 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
1046 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
1077 dml_print("DML_DLG: %s: htotal = %d\n", __func__, htotal);
1116 if (htotal <
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/linux-master/drivers/gpu/drm/gud/
H A Dgud_internal.h139 dst->htotal = cpu_to_le16(src->htotal);
157 dst->htotal = le16_to_cpu(src->htotal);
/linux-master/drivers/gpu/drm/bridge/cadence/
H A Dcdns-dsi-core.h40 unsigned int htotal; member in struct:cdns_dsi_cfg
/linux-master/drivers/gpu/drm/mgag200/
H A Dmgag200_mode.c206 unsigned int hdisplay, hsyncstart, hsyncend, htotal; local
213 htotal = mode->htotal / 8 - 1;
216 if ((htotal & 0x07) == 0x06 || (htotal & 0x07) == 0x04)
217 htotal++;
236 crtcext1 = (((htotal - 4) & 0x100) >> 8) |
239 (htotal & 0x40);
251 WREG_CRT(0, htotal - 4);
254 WREG_CRT(3, (htotal
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