Searched refs:gart (Results 1 - 25 of 55) sorted by relevance

123

/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_gart.c62 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
68 * gart table to be in system memory.
75 ptr = dma_alloc_coherent(&rdev->pdev->dev, rdev->gart.table_size,
76 &rdev->gart.table_addr, GFP_KERNEL);
84 rdev->gart.table_size >> PAGE_SHIFT);
87 rdev->gart.ptr = ptr;
92 * radeon_gart_table_ram_free - free system ram for gart page table
98 * gart table to be in system memory.
102 if (!rdev->gart.ptr)
108 set_memory_wb((unsigned long)rdev->gart
[all...]
H A Drs400.c44 /* Check gart size */
84 if (rdev->gart.ptr) {
88 /* Check gart size */
101 /* Initialize common gart structure */
106 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
118 /* Check gart size */
164 tmp = (u32)rdev->gart.table_addr & 0xfffff000;
165 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4;
187 /* Enable gart */
[all...]
H A Dradeon_asic.c151 * Removes AGP flags and changes the gart callbacks on AGP
152 * cards when using the internal gart rather than AGP (all asics).
166 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
167 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry;
168 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
172 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush;
173 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry;
174 rdev->asic->gart.set_page = &r100_pci_gart_set_page;
208 .gart = {
276 .gart
[all...]
H A Drs600.c549 if (rdev->gart.robj) {
553 /* Initialize common gart structure */
558 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8;
567 if (rdev->gart.robj == NULL) {
604 rdev->gart.table_addr);
621 (unsigned long long)rdev->gart.table_addr);
622 rdev->gart.ready = true;
630 /* FIXME: disable out of gart access */
662 void __iomem *ptr = (void *)rdev->gart
[all...]
H A Dr300.c121 void __iomem *ptr = rdev->gart.ptr;
133 if (rdev->gart.robj) {
137 /* Initialize common gart structure */
143 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
144 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
145 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry;
146 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
156 if (rdev->gart.robj == NULL) {
171 table_addr = rdev->gart
[all...]
H A Dr100.c655 if (rdev->gart.ptr) {
659 /* Initialize common gart structure */
663 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
664 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush;
665 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry;
666 rdev->asic->gart.set_page = &r100_pci_gart_set_page;
681 WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr);
687 (unsigned long long)rdev->gart.table_addr);
688 rdev->gart
[all...]
H A Dradeon_vm.c35 * GPUVM is similar to the legacy gart on older asics, however
36 * rather than there being a single global gart table
369 uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8;
587 * radeon_vm_map_gart - get the physical address of a gart page
601 result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT];
H A Dradeon_ttm.c855 if (p >= rdev->gart.num_cpu_pages)
858 page = rdev->gart.pages[p];
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gart.c70 * This dummy page is used by the driver as a filler for gart entries
107 * amdgpu_gart_table_ram_alloc - allocate system ram for gart page table
117 unsigned int order = get_order(adev->gart.table_size);
127 if (adev->gart.bo != NULL)
142 dma_addr = dma_map_page(&adev->pdev->dev, p, 0, adev->gart.table_size,
163 sg->sgl->length = adev->gart.table_size;
165 sg->sgl->dma_length = adev->gart.table_size;
169 bp.size = adev->gart.table_size;
196 adev->gart.bo = bo;
197 adev->gart
[all...]
H A Dgmc_v10_0.c240 * gmc_v10_0_flush_gpu_tlb - gart tlb flush callback
700 * vram and gart within the GPU's physical address space.
729 /* set the gart size */
755 if (adev->gart.bo) {
760 /* Initialize common gart structure */
765 adev->gart.table_size = adev->gart.num_gpu_pages * 8;
766 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_NV10(MTYPE_UC) |
940 * gmc_v10_0_gart_enable - gart enable
949 if (adev->gart
[all...]
H A Dgmc_v6_0.c324 /* set the gart size */
469 if (adev->gart.bo == NULL) {
475 table_addr = amdgpu_bo_gpu_offset(adev->gart.bo);
560 if (adev->gart.bo) {
567 adev->gart.table_size = adev->gart.num_gpu_pages * 8;
568 adev->gart.gart_pte_flags = 0;
H A Dgmc_v11_0.c199 * gmc_v11_0_flush_gpu_tlb - gart tlb flush callback
669 * vram and gart within the GPU's physical address space.
700 /* set the gart size */
715 if (adev->gart.bo) {
720 /* Initialize common gart structure */
725 adev->gart.table_size = adev->gart.num_gpu_pages * 8;
726 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_NV10(MTYPE_UC) |
874 * gmc_v11_0_gart_enable - gart enable
883 if (adev->gart
[all...]
H A Dgmc_v7_0.c252 * Set the location of vram, gart, and AGP in the GPU's
313 * vram and gart within the GPU's physical address space (CIK).
388 /* set the gart size */
453 * gmc_v7_0_flush_gpu_tlb - gart tlb flush callback
592 * gmc_v7_0_gart_enable - gart enable
608 if (adev->gart.bo == NULL) {
613 table_addr = amdgpu_bo_gpu_offset(adev->gart.bo);
708 if (adev->gart.bo) {
712 /* Initialize common gart structure */
716 adev->gart
[all...]
H A Dgmc_v9_0.c1657 * vram and gart within the GPU's physical address space.
1710 /* set the gart size */
1743 if (adev->gart.bo) {
1756 /* Initialize common gart structure */
1760 adev->gart.table_size = adev->gart.num_gpu_pages * 8;
1761 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_VG10(MTYPE_UC) |
2237 * gmc_v9_0_gart_enable - gart enable
2248 if (adev->gart.bo == NULL) {
2271 (unsigned long long)amdgpu_bo_gpu_offset(adev->gart
[all...]
H A Dgmc_v8_0.c426 * Set the location of vram, gart, and AGP in the GPU's
498 * vram and gart within the GPU's physical address space (VI).
578 /* set the gart size */
643 * gmc_v8_0_flush_gpu_tlb - gart tlb flush callback
806 * gmc_v8_0_gart_enable - gart enable
822 if (adev->gart.bo == NULL) {
827 table_addr = amdgpu_bo_gpu_offset(adev->gart.bo);
939 if (adev->gart.bo) {
943 /* Initialize common gart structure */
947 adev->gart
[all...]
H A Damdgpu_gmc.c232 /** amdgpu_gmc_sysvm_location - place vram and gart in sysvm aperture
239 * and gart (aka system memory) access.
246 * address 0. So vram start at address 0 and gart is right after vram.
661 job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
1000 uint64_t flags = adev->gart.gart_pte_flags; //TODO it is UC. explore NC/RW?
1008 u64 gart_ptb_gpu_pa = amdgpu_gmc_vram_pa(adev, adev->gart.bo);
H A Dgfxhub_v2_0.c136 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
H A Dgfxhub_v3_0_3.c138 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
H A Dgfxhub_v1_0.c61 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
66 * vram and system memory (gart)
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_chan.h28 struct nvif_object gart; member in struct:nouveau_channel
66 u32 vram, u32 gart, struct nouveau_channel **);
H A Dnouveau_chan.c103 nvif_object_dtor(&chan->gart);
364 nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) argument
396 /* allocate dma objects to cover all allowed vram, and gart */
435 ret = nvif_object_ctor(&chan->user, "abi16ChanGartCtxDma", gart,
437 &chan->gart);
497 bool priv, u64 runm, u32 vram, u32 gart, struct nouveau_channel **pchan)
508 ret = nouveau_channel_init(*pchan, vram, gart);
496 nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device, bool priv, u64 runm, u32 vram, u32 gart, struct nouveau_channel **pchan) argument
/linux-master/arch/x86/kernel/
H A Dpci-dma.c15 #include <asm/gart.h>
H A Daperture_64.c29 #include <asm/gart.h>
39 * the gart aperture that is used.
42 * ==> kexec (with kdump trigger path or gart still enabled)
43 * ==> kernel_small (gart area become e820_reserved)
44 * ==> kexec (with kdump trigger path or gart still enabled)
46 * So don't use 512M below as gart iommu, leave the space for kernel
183 /* old_order could be the value from NB gart setting */
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_migrate.c61 /* use gart window 0 */
78 dst_addr = amdgpu_bo_gpu_offset(adev->gart.bo);
89 pte_flags |= adev->gart.gart_pte_flags;
151 dev_err(adev->dev, "fail %d create gart mapping\n", r);
/linux-master/drivers/char/agp/
H A Damd64-agp.c20 #include <asm/gart.h>
208 /* disable gart translation */

Completed in 281 milliseconds

123