Searched refs:fifo (Results 1 - 17 of 17) sorted by path

/haiku-fatelf/build/scripts/
H A Dbuild_haiku_image76 fifoBasePath=/tmp/build_haiku_image-$$-fifo
/haiku-fatelf/headers/private/graphics/nvidia/
H A DDriverInterface.h176 * caused by the existance of DMA engine command buffers in cardRAM and/or fifo
180 * - we need at least 70kB distance from the end of RAM for fifo-reassigning 'bug'
190 * - we need at least ???kB distance from the end of RAM for fifo-reassigning 'bug'
191 * (fixme: unknown yet because fifo assignment switching isn't used here atm);
195 /* fifo re-assigning bug definition:
196 * if the fifo assignment is changed while at the same time card memory in the
322 } fifo; member in struct:__anon821::__anon823
/haiku-fatelf/headers/private/graphics/nvidia_gpgpu/
H A DDriverInterface.h118 * caused by the existance of DMA engine command buffers in cardRAM and/or fifo
126 * - we need at least ???kB distance from the end of RAM for fifo-reassigning 'bug'
127 * (fixme: unknown yet because fifo assignment switching isn't used here atm);
131 /* fifo re-assigning bug definition:
132 * if the fifo assignment is changed while at the same time card memory in the
241 } fifo; member in struct:__anon864::__anon866
/haiku-fatelf/headers/private/graphics/vmware/
H A DDriverInterface.h108 void *fifo; member in struct:__anon987
/haiku-fatelf/headers/private/net/
H A Dnet_stack.h146 // fifo
147 status_t (*init_fifo)(net_fifo* fifo, const char* name, size_t maxBytes);
148 void (*uninit_fifo)(net_fifo* fifo);
149 status_t (*fifo_enqueue_buffer)(net_fifo* fifo, net_buffer* buffer);
150 ssize_t (*fifo_dequeue_buffer)(net_fifo* fifo, uint32 flags,
152 status_t (*clear_fifo)(net_fifo* fifo);
153 status_t (*fifo_socket_enqueue_buffer)(net_fifo* fifo,
/haiku-fatelf/src/add-ons/accelerants/nvidia/engine/
H A Dnv_acc.c1003 /*** setup acceleration engine command shortcuts (so via fifo) ***/
1009 si->engine.fifo.handle[0] = NV_ROP5_SOLID;
1010 si->engine.fifo.handle[1] = NV_IMAGE_BLACK_RECTANGLE;
1011 si->engine.fifo.handle[2] = NV_IMAGE_PATTERN;
1012 si->engine.fifo.handle[3] = NV4_SURFACE; /* NV10_CONTEXT_SURFACES_2D is identical */
1013 si->engine.fifo.handle[4] = NV_IMAGE_BLIT;
1014 si->engine.fifo.handle[5] = NV4_GDI_RECTANGLE_TEXT;
1017 si->engine.fifo.handle[6] = NV1_RENDER_SOLID_LIN;
1018 si->engine.fifo.handle[7] = NV4_DX5_TEXTURE_TRIANGLE;
1023 si->engine.fifo
[all...]
H A Dnv_acc_dma.c1027 si->engine.fifo.handle[0] = NV_ROP5_SOLID;
1028 si->engine.fifo.handle[1] = NV_IMAGE_BLACK_RECTANGLE;
1029 si->engine.fifo.handle[2] = NV_IMAGE_PATTERN;
1030 si->engine.fifo.handle[3] = NV4_SURFACE; /* NV10_CONTEXT_SURFACES_2D is identical */
1031 si->engine.fifo.handle[4] = NV_IMAGE_BLIT;
1032 si->engine.fifo.handle[5] = NV4_GDI_RECTANGLE_TEXT;
1033 si->engine.fifo.handle[6] = NV4_CONTEXT_SURFACES_ARGB_ZS;//NV1_RENDER_SOLID_LIN;
1034 si->engine.fifo.handle[7] = NV4_DX5_TEXTURE_TRIANGLE;
1038 si->engine.fifo.ch_ptr[cnt] = 0;
1045 si->engine.fifo
[all...]
/haiku-fatelf/src/add-ons/accelerants/nvidia_gpgpu/engine/
H A Dnv_acc_dma.c569 si->engine.fifo.handle[0] = NV_ROP5_SOLID;
570 si->engine.fifo.handle[1] = NV_IMAGE_BLACK_RECTANGLE;
571 si->engine.fifo.handle[2] = NV_IMAGE_PATTERN;
572 si->engine.fifo.handle[3] = NV4_SURFACE; /* NV10_CONTEXT_SURFACES_2D is identical */
573 si->engine.fifo.handle[4] = NV_IMAGE_BLIT;
574 si->engine.fifo.handle[5] = NV4_GDI_RECTANGLE_TEXT;
576 si->engine.fifo.handle[6] = 0;
577 si->engine.fifo.handle[7] = 0;
581 si->engine.fifo.ch_ptr[cnt] = 0;
588 si->engine.fifo
[all...]
/haiku-fatelf/src/add-ons/accelerants/vmware/
H A DFifo.c44 TRACE("fifo capabilities:\n");
54 uint32 *fifo = gSi->fifo; local
66 gSi->fifoCapabilities = fifo[SVGA_FIFO_CAPABILITIES];
67 gSi->fifoFlags = fifo[SVGA_FIFO_FLAGS];
71 fifo[SVGA_FIFO_MIN] = gSi->fifoMin * 4;
72 fifo[SVGA_FIFO_MAX] = gSi->fifoSize;
73 fifo[SVGA_FIFO_NEXT_CMD] = fifo[SVGA_FIFO_MIN];
74 fifo[SVGA_FIFO_STO
106 uint32 *fifo = gSi->fifo; local
123 uint32 *fifo = gSi->fifo; local
[all...]
/haiku-fatelf/src/add-ons/kernel/drivers/graphics/vmware/
H A Ddevice.c80 TRACE("fifo: %p, size %ld\n", si->fifoDma, si->fifoSize);
115 /* Map the fifo */
116 si->fifoArea = map_physical_memory("VMware fifo",
118 B_READ_AREA|B_WRITE_AREA, (void **)&si->fifo);
120 TRACE("failed to map fifo\n");
124 TRACE("fifo mapped: %p->%p, area %ld, size %ld\n", si->fifoDma,
125 si->fifo, si->fifoArea, si->fifoSize);
149 si->fb = si->fifo = NULL;
/haiku-fatelf/src/add-ons/kernel/network/protocols/unix/
H A DUnixEndpoint.cpp334 UnixFifo* fifo = new(nothrow) UnixFifo(UNIX_MAX_TRANSFER_UNIT); local
336 ObjectDeleter<UnixFifo> fifoDeleter(fifo);
340 if ((error = fifo->Init()) != B_OK || (error = peerFifo->Init()) != B_OK)
363 fReceiveFifo = fifo;
544 UnixFifo* fifo = fReceiveFifo; local
545 BReference<UnixFifo> _(fifo);
546 UnixFifoLocker fifoLocker(fifo);
551 ssize_t result = fifo->Read(vecs, vecCount, _ancillaryData, timeout);
554 size_t writable = fifo->Writable();
556 && !fifo
738 _Spawn(UnixEndpoint* connectingEndpoint, UnixEndpoint* listeningEndpoint, UnixFifo* fifo) argument
[all...]
H A DUnixEndpoint.h100 UnixEndpoint* listeningEndpoint, UnixFifo* fifo);
/haiku-fatelf/src/add-ons/kernel/network/stack/
H A Dutility.cpp83 base_fifo_init(FifoType* fifo, const char* name, size_t maxBytes) argument
85 fifo->notify = create_sem(0, name);
86 fifo->max_bytes = maxBytes;
87 fifo->current_bytes = 0;
88 fifo->waiting = 0;
89 list_init(&fifo->buffers);
91 return fifo->notify;
96 base_fifo_enqueue_buffer(FifoType* fifo, net_buffer* buffer) argument
98 if (fifo->max_bytes > 0
99 && fifo
111 base_fifo_clear(FifoType* fifo) argument
334 init_fifo(net_fifo* fifo, const char* name, size_t maxBytes) argument
347 uninit_fifo(net_fifo* fifo) argument
357 fifo_enqueue_buffer(net_fifo* fifo, net_buffer* buffer) argument
374 fifo_dequeue_buffer(net_fifo* fifo, uint32 flags, bigtime_t timeout, net_buffer** _buffer) argument
429 clear_fifo(net_fifo* fifo) argument
437 fifo_socket_enqueue_buffer(net_fifo* fifo, net_socket* socket, uint8 event, net_buffer* _buffer) argument
[all...]
H A Dutility.h55 status_t init_fifo(net_fifo* fifo, const char *name, size_t maxBytes);
56 void uninit_fifo(net_fifo* fifo);
57 status_t fifo_enqueue_buffer(net_fifo* fifo, struct net_buffer* buffer);
58 ssize_t fifo_dequeue_buffer(net_fifo* fifo, uint32 flags, bigtime_t timeout,
60 status_t clear_fifo(net_fifo* fifo);
61 status_t fifo_socket_enqueue_buffer(net_fifo* fifo, net_socket* socket,
/haiku-fatelf/src/bin/coreutils/src/
H A Dls.c161 fifo, enumerator in enum:filetype
2530 case DT_FIFO: type = fifo; break;
4100 else if (stat_ok ? S_ISFIFO (mode) : type == fifo)
/haiku-fatelf/src/bin/gdb/gdb/
H A Dser-go32.c79 /* fifo control register */
80 #define FIFO_ENABLE 0x01 /* enable fifo */
81 #define FIFO_RCV_RST 0x02 /* reset receive fifo */
82 #define FIFO_XMT_RST 0x04 /* reset transmit fifo */
111 #define LSR_RCV_FIFO 0x80 /* error in receive fifo */
137 /* 16550 rx fifo trigger point */
200 int fifo; member in struct:dos_ttystate
510 /* tentatively enable 16550 fifo, and see if it responds */
514 port->fifo = ((inb (port, com_iir) & IIR_FIFO_MASK) == IIR_FIFO_MASK);
580 /* disable interrupts, fifo, flo
[all...]
/haiku-fatelf/src/system/kernel/fs/
H A Dfifo.cpp8 #include "fifo.h"
52 namespace fifo { namespace
507 THREAD_BLOCK_TYPE_OTHER, "fifo read request");
621 TRACE("Inode %p::Open(): fifo becomes active\n", this);
726 FIFOInode* fifo = (FIFOInode*)vnode->private_node; local
727 fs_vnode* superVnode = fifo->SuperVnode();
733 delete fifo;
742 FIFOInode* fifo = (FIFOInode*)vnode->private_node; local
743 fs_vnode* superVnode = fifo->SuperVnode();
749 delete fifo;
781 FIFOInode* fifo = (FIFOInode*)vnode->private_node; local
891 FIFOInode* fifo = (FIFOInode*)vnode->private_node; local
1022 FIFOInode* fifo = (FIFOInode*)vnode->private_node; local
1127 FIFOInode* fifo = new(std::nothrow) FIFOInode(vnode); local
[all...]

Completed in 201 milliseconds