/linux-master/drivers/gpu/drm/nouveau/nvkm/falcon/ |
H A D | tu102.c | 25 tu102_flcn_riscv_active(struct nvkm_falcon *falcon) argument 27 return (nvkm_falcon_rd32(falcon, falcon->addr2 + 0x240) & 0x00000001) != 0;
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H A D | priv.h | 4 #include <core/falcon.h> 7 nvkm_falcon_enable(struct nvkm_falcon *falcon) argument 9 if (falcon->func->enable) 10 return falcon->func->enable(falcon);
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H A D | gm200.c | 29 gm200_flcn_tracepc(struct nvkm_falcon *falcon) argument 31 u32 sctl = nvkm_falcon_rd32(falcon, 0x240); 32 u32 tidx = nvkm_falcon_rd32(falcon, 0x148); 35 FLCN_ERR(falcon, "TRACEPC SCTL %08x TIDX %08x", sctl, tidx); 37 nvkm_falcon_wr32(falcon, 0x148, sp); 38 ip = nvkm_falcon_rd32(falcon, 0x14c); 39 FLCN_ERR(falcon, "TRACEPC: %08x", ip); 44 gm200_flcn_pio_dmem_rd(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len) argument 47 *(u32 *)img = nvkm_falcon_rd32(falcon, 0x1c4 + (port * 8)); 54 u32 data = nvkm_falcon_rd32(falcon, 64 gm200_flcn_pio_dmem_rd_init(struct nvkm_falcon *falcon, u8 port, u32 dmem_base) argument 70 gm200_flcn_pio_dmem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag) argument 82 gm200_flcn_pio_dmem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 dmem_base) argument 98 gm200_flcn_pio_imem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 imem_base) argument 104 gm200_flcn_pio_imem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag) argument 123 gm200_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr) argument 132 gm200_flcn_bind_inst(struct nvkm_falcon *falcon, int target, u64 addr) argument 141 gm200_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *falcon) argument 155 gm200_flcn_enable(struct nvkm_falcon *falcon) argument 184 gm200_flcn_disable(struct nvkm_falcon *falcon) argument 220 struct nvkm_falcon *falcon = fw->falcon; local 251 struct nvkm_falcon *falcon = fw->falcon; local 333 struct nvkm_falcon *falcon = fw->falcon; local [all...] |
H A D | base.c | 29 nvkm_falcon_intr_retrigger(struct nvkm_falcon *falcon) argument 31 if (falcon->func->intr_retrigger) 32 falcon->func->intr_retrigger(falcon); 36 nvkm_falcon_riscv_active(struct nvkm_falcon *falcon) argument 38 if (!falcon->func->riscv_active) 41 return falcon->func->riscv_active(falcon); 45 nvkm_falcon_dma(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base) argument 48 case IMEM: return falcon 56 nvkm_falcon_dma_wr(struct nvkm_falcon *falcon, const u8 *img, u64 dma_addr, u32 dma_base, enum nvkm_falcon_mem mem_type, u32 mem_base, int len, bool sec) argument 121 nvkm_falcon_pio(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base) argument 140 nvkm_falcon_pio_rd(struct nvkm_falcon *falcon, u8 port, enum nvkm_falcon_mem mem_type, u32 mem_base, const u8 *img, u32 img_base, int len) argument 175 nvkm_falcon_pio_wr(struct nvkm_falcon *falcon, const u8 *img, u32 img_base, u8 port, enum nvkm_falcon_mem mem_type, u32 mem_base, int len, u16 tag, bool sec) argument 212 nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start, u32 size, u16 tag, u8 port, bool secure) argument 226 nvkm_falcon_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start, u32 size, u8 port) argument 237 nvkm_falcon_start(struct nvkm_falcon *falcon) argument 243 nvkm_falcon_reset(struct nvkm_falcon *falcon) argument 255 nvkm_falcon_oneinit(struct nvkm_falcon *falcon) argument 286 nvkm_falcon_put(struct nvkm_falcon *falcon, struct nvkm_subdev *user) argument 300 nvkm_falcon_get(struct nvkm_falcon *falcon, struct nvkm_subdev *user) argument 321 nvkm_falcon_dtor(struct nvkm_falcon *falcon) argument 326 nvkm_falcon_ctor(const struct nvkm_falcon_func *func, struct nvkm_subdev *subdev, const char *name, u32 addr, struct nvkm_falcon *falcon) argument [all...] |
H A D | ga102.c | 28 ga102_flcn_riscv_active(struct nvkm_falcon *falcon) argument 30 return (nvkm_falcon_rd32(falcon, falcon->addr2 + 0x388) & 0x00000080) != 0; 34 ga102_flcn_dma_done(struct nvkm_falcon *falcon) argument 36 return !!(nvkm_falcon_rd32(falcon, 0x118) & 0x00000002); 40 ga102_flcn_dma_xfer(struct nvkm_falcon *falcon, u32 mem_base, u32 dma_base, u32 cmd) argument 42 nvkm_falcon_wr32(falcon, 0x114, mem_base); 43 nvkm_falcon_wr32(falcon, 0x11c, dma_base); 44 nvkm_falcon_wr32(falcon, 0x118, cmd); 48 ga102_flcn_dma_init(struct nvkm_falcon *falcon, u6 argument 70 ga102_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *falcon) argument 84 ga102_flcn_reset_prep(struct nvkm_falcon *falcon) argument 98 ga102_flcn_select(struct nvkm_falcon *falcon) argument 115 struct nvkm_falcon *falcon = fw->falcon; local 128 struct nvkm_falcon *falcon = fw->falcon; local [all...] |
H A D | gp102.c | 25 gp102_flcn_pio_emem_rd(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len) argument 28 *(u32 *)img = nvkm_falcon_rd32(falcon, 0xac4 + (port * 8)); 35 gp102_flcn_pio_emem_rd_init(struct nvkm_falcon *falcon, u8 port, u32 dmem_base) argument 37 nvkm_falcon_wr32(falcon, 0xac0 + (port * 8), BIT(25) | dmem_base); 41 gp102_flcn_pio_emem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag) argument 44 nvkm_falcon_wr32(falcon, 0xac4 + (port * 8), *(u32 *)img); 51 gp102_flcn_pio_emem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 emem_base) argument 53 nvkm_falcon_wr32(falcon, 0xac0 + (port * 8), BIT(24) | emem_base); 67 gp102_flcn_reset_eng(struct nvkm_falcon *falcon) argument 71 if (falcon [all...] |
H A D | v1.c | 29 nvkm_falcon_v1_load_imem(struct nvkm_falcon *falcon, void *data, u32 start, argument 39 nvkm_falcon_wr32(falcon, 0x180 + (port * 16), reg); 43 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++); 44 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), ((u32 *)data)[i]); 56 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++); 57 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), 64 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), 0); 68 nvkm_falcon_v1_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start, argument 76 nvkm_falcon_wr32(falcon, 0x1c0 + (port * 8), start | (0x1 << 24)); 78 nvkm_falcon_wr32(falcon, 93 nvkm_falcon_v1_start(struct nvkm_falcon *falcon) argument [all...] |
H A D | ga100.c | 25 ga100_flcn_intr_retrigger(struct nvkm_falcon *falcon) argument 27 nvkm_falcon_wr32(falcon, 0x3e8, 0x00000001); 33 struct nvkm_falcon *falcon = fw->falcon; local 34 struct nvkm_device *device = falcon->owner->device; 38 FLCN_DBG(falcon, "brom: %08x %08x", fw->engine_id, fw->ucode_id); 39 FLCN_DBG(falcon, "fuse_version: %d", fw->fuse_ver); 54 FLCN_DBG(falcon, "reg_fuse_version: %08x", reg_fuse_version); 57 FLCN_DBG(falcon, "reg_fuse_version: %d", reg_fuse_version);
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H A D | msgq.c | 29 msgq->position = nvkm_falcon_rd32(msgq->qmgr->falcon, msgq->tail_reg); 35 struct nvkm_falcon *falcon = msgq->qmgr->falcon; local 38 nvkm_falcon_wr32(falcon, msgq->tail_reg, msgq->position); 46 u32 head = nvkm_falcon_rd32(msgq->qmgr->falcon, msgq->head_reg); 47 u32 tail = nvkm_falcon_rd32(msgq->qmgr->falcon, msgq->tail_reg); 54 struct nvkm_falcon *falcon = msgq->qmgr->falcon; local 57 head = nvkm_falcon_rd32(falcon, msgq->head_reg); 71 nvkm_falcon_pio_rd(falcon, 157 struct nvkm_falcon *falcon = msgq->qmgr->falcon; local [all...] |
H A D | qmgr.c | 28 const struct nvkm_subdev *subdev = qmgr->falcon->owner; 70 nvkm_falcon_qmgr_new(struct nvkm_falcon *falcon, argument 79 qmgr->falcon = falcon;
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/linux-master/drivers/gpu/drm/tegra/ |
H A D | falcon.c | 12 #include "falcon.h" 20 static void falcon_writel(struct falcon *falcon, u32 value, u32 offset) argument 22 writel(value, falcon->regs + offset); 25 int falcon_wait_idle(struct falcon *falcon) argument 29 return readl_poll_timeout(falcon->regs + FALCON_IDLESTATE, value, 33 static int falcon_dma_wait_idle(struct falcon *falcon) argument 37 return readl_poll_timeout(falcon 41 falcon_copy_chunk(struct falcon *falcon, phys_addr_t base, unsigned long offset, enum falcon_memory target) argument 66 falcon_copy_firmware_image(struct falcon *falcon, const struct firmware *firmware) argument 77 falcon_parse_firmware_image(struct falcon *falcon) argument 112 falcon_read_firmware(struct falcon *falcon, const char *name) argument 126 falcon_load_firmware(struct falcon *falcon) argument 147 falcon_init(struct falcon *falcon) argument 154 falcon_exit(struct falcon *falcon) argument 160 falcon_boot(struct falcon *falcon) argument 227 falcon_execute_method(struct falcon *falcon, u32 method, u32 data) argument [all...] |
H A D | falcon.h | 99 struct falcon { struct 100 /* Set by falcon client */ 107 int falcon_init(struct falcon *falcon); 108 void falcon_exit(struct falcon *falcon); 109 int falcon_read_firmware(struct falcon *falcon, const char *firmware_name); 110 int falcon_load_firmware(struct falcon *falcon); [all...] |
H A D | vic.c | 20 #include "falcon.h" 30 struct falcon falcon; member in struct:vic 88 err = falcon_boot(&vic->falcon); 92 hdr = vic->falcon.firmware.virt; 97 hdr = vic->falcon.firmware.virt + 101 falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE, 104 &vic->falcon, VIC_SET_FCE_UCODE_OFFSET, 105 (vic->falcon.firmware.iova + fce_bin_data_offset) >> 8); 108 err = falcon_wait_idle(&vic->falcon); [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ |
H A D | falcon.c | 22 #include <engine/falcon.h> 32 struct nvkm_falcon *falcon = nvkm_falcon(oclass->engine); local 35 while (falcon->func->sclass[c].oclass) { 37 oclass->base = falcon->func->sclass[index]; 61 struct nvkm_falcon *falcon = nvkm_falcon(engine); local 62 struct nvkm_subdev *subdev = &falcon->engine.subdev; 64 const u32 base = falcon->addr; 74 if (falcon->func->intr) { 75 falcon->func->intr(falcon, cha 98 struct nvkm_falcon *falcon = nvkm_falcon(engine); local 131 struct nvkm_falcon *falcon = nvkm_falcon(engine); local 162 struct nvkm_falcon *falcon = nvkm_falcon(engine); local 342 struct nvkm_falcon *falcon; local [all...] |
/linux-master/drivers/net/ethernet/sfc/falcon/ |
H A D | Makefile | 2 sfc-falcon-y += efx.o nic.o farch.o falcon.o tx.o rx.o selftest.o \ 6 sfc-falcon-$(CONFIG_SFC_FALCON_MTD) += mtd.o 7 obj-$(CONFIG_SFC_FALCON) += sfc-falcon.o
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/engine/ |
H A D | sec.h | 4 #include <engine/falcon.h>
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H A D | msppp.h | 4 #include <engine/falcon.h>
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H A D | nvenc.h | 6 #include <core/falcon.h> 11 struct nvkm_falcon falcon; member in struct:nvkm_nvenc
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H A D | falcon.h | 113 nvkm_falcon_rd32(struct nvkm_falcon *falcon, u32 addr) argument 115 return nvkm_rd32(falcon->owner->device, falcon->addr + addr); 119 nvkm_falcon_wr32(struct nvkm_falcon *falcon, u32 addr, u32 data) argument 121 nvkm_wr32(falcon->owner->device, falcon->addr + addr, data); 125 nvkm_falcon_mask(struct nvkm_falcon *falcon, u32 addr, u32 mask, u32 val) argument 127 struct nvkm_device *device = falcon->owner->device; 129 return nvkm_mask(device, falcon->addr + addr, mask, val);
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H A D | sec2.h | 6 #include <core/falcon.h> 11 struct nvkm_falcon falcon; member in struct:nvkm_sec2
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H A D | nvdec.h | 6 #include <core/falcon.h> 11 struct nvkm_falcon falcon; member in struct:nvkm_nvdec
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
H A D | gm200.c | 27 gm200_pmu_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr) argument 29 nvkm_falcon_wr32(falcon, 0x200, 0x0000030e); 30 return (nvkm_falcon_rd32(falcon, 0x20c) & 0x00007000) >> 12; 34 gm200_pmu_flcn_bind_inst(struct nvkm_falcon *falcon, int target, u64 addr) argument 36 nvkm_falcon_wr32(falcon, 0xe00, 4); /* DMAIDX_UCODE */ 37 nvkm_falcon_wr32(falcon, 0xe04, 0); /* DMAIDX_VIRT */ 38 nvkm_falcon_wr32(falcon, 0xe08, 4); /* DMAIDX_PHYS_VID */ 39 nvkm_falcon_wr32(falcon, 0xe0c, 5); /* DMAIDX_PHYS_SYS_COH */ 40 nvkm_falcon_wr32(falcon, 0xe10, 6); /* DMAIDX_PHYS_SYS_NCOH */ 41 nvkm_falcon_mask(falcon, [all...] |
/linux-master/arch/mips/lantiq/ |
H A D | Makefile | 10 obj-$(CONFIG_SOC_FALCON) += falcon/
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
H A D | base.c | 44 struct nvkm_falcon *falcon = &sec2->falcon; local 61 if (nvkm_falcon_rd32(falcon, 0x100) & 0x00000010) 69 falcon->func->disable(falcon); 70 nvkm_falcon_put(falcon, subdev); 79 struct nvkm_falcon *falcon = &sec2->falcon; local 82 ret = nvkm_falcon_get(falcon, subdev); 86 nvkm_falcon_wr32(falcon, [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ |
H A D | ga102.c | 33 ret = gsp->falcon.func->reset_eng(&gsp->falcon); 37 nvkm_falcon_mask(&gsp->falcon, 0x1668, 0x00000111, 0x00000111); 43 struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw) 61 blob->data + hdr->data_offset, hdr->data_size, falcon, fw); 97 struct nvkm_falcon *falcon = fw->falcon; local 98 struct nvkm_device *device = falcon->owner->device; 103 FLCN_DBG(falcon, "brom: %08x %08x", fw->engine_id, fw->ucode_id); 104 FLCN_DBG(falcon, "sig_fuse_versio 42 ga102_gsp_booter_ctor(struct nvkm_gsp *gsp, const char *name, const struct firmware *blob, struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw) argument [all...] |