Searched refs:engn (Results 1 - 25 of 31) sorted by relevance

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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dcgrp.c37 struct nvkm_engn *engn = ectx->engn; local
40 CGRP_TRACE(cgrp, "dtor ectx %d[%s]", engn->id, engn->engine->subdev.name);
51 nvkm_cgrp_ectx_get(struct nvkm_cgrp *cgrp, struct nvkm_engn *engn, struct nvkm_ectx **pectx, argument
54 struct nvkm_engine *engine = engn->engine;
63 ectx = nvkm_list_find(ectx, &cgrp->ectxs, head, ectx->engn == engn);
71 CGRP_TRACE(cgrp, "ctor ectx %d[%s]", engn->id, engn
98 struct nvkm_engn *engn = vctx->ectx->engn; local
119 nvkm_cgrp_vctx_get(struct nvkm_cgrp *cgrp, struct nvkm_engn *engn, struct nvkm_chan *chan, struct nvkm_vctx **pvctx, struct nvkm_client *client) argument
[all...]
H A Dg98.c39 nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0);
40 nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MSPPP, 0);
41 nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_CE, 0);
42 nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_MSPDEC, 0);
43 nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_SEC, 0);
44 nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_MSVLD, 0);
59 .engn = &g84_engn,
H A Drunl.c34 nvkm_engn_cgrp_get(struct nvkm_engn *engn, unsigned long *pirqflags) argument
41 id = engn->func->cxid(engn, &cgid);
46 chan = nvkm_runl_chan_get_chid(engn->runl, id, pirqflags);
50 cgrp = nvkm_runl_cgrp_get_cgid(engn->runl, id, pirqflags);
63 struct nvkm_engn *engn; local
101 nvkm_runl_foreach_engn_cond(engn, runl, engn->func->cxid) {
102 cgrp = nvkm_engn_cgrp_get(engn, &flags);
104 ENGN_DEBUG(engn, "cxi
155 nvkm_runl_rc_engn(struct nvkm_runl *runl, struct nvkm_engn *engn) argument
320 struct nvkm_engn *engn, *engt; local
344 struct nvkm_engn *engn; local
[all...]
H A Dgf100.c161 gf100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
166 switch (engn->engine->subdev.type) {
169 case NVKM_ENGINE_CE : ptr0 = 0x0230 + (engn->engine->subdev.inst * 0x10); break;
190 gf100_ectx_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx) argument
202 gf100_engn_mmu_fault_triggered(struct nvkm_engn *engn) argument
204 struct nvkm_runl *runl = engn->runl;
207 u32 data = nvkm_rd32(device, 0x002a30 + (engn->id * 4));
209 ENGN_DEBUG(engn, "%08x: mmu fault triggered", data);
214 nvkm_mask(device, 0x002a30 + (engn->id * 4), 0x00000100, 0x00000000);
222 gf100_engn_mmu_fault_trigger(struct nvkm_engn *engn) argument
247 gf100_engn_status(struct nvkm_engn *engn, struct gf100_engn_status *status) argument
262 gf100_engn_cxid(struct nvkm_engn *engn, bool *cgid) argument
276 gf100_engn_chsw(struct nvkm_engn *engn) argument
541 struct nvkm_engn *engn; local
621 struct nvkm_engn *engn, *engn2; local
648 struct nvkm_engn *engn; local
769 gf100_fifo_intr_engine_unit(struct nvkm_fifo *fifo, int engn) argument
[all...]
H A Duchan.c87 nvkm_chan_cctx_bind(chan, ectx->engn, NULL);
120 nvkm_chan_cctx_bind(chan, ectx->engn, cctx);
134 struct nvkm_engn *engn; local
139 engn = uobj->cctx->vctx->ectx->engn;
140 if (engn->func->ramht_del)
141 engn->func->ramht_del(uobj->chan, uobj->hash);
159 struct nvkm_engn *engn; local
164 engn = nvkm_runl_find_engn(engn, cgr
207 struct nvkm_engn *engn; local
[all...]
H A Dchan.c41 nvkm_chan_cctx_bind(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx *cctx) argument
45 struct nvkm_engine *engine = engn->engine;
47 if (!engn->func->bind)
50 CHAN_TRACE(chan, "%sbind cctx %d[%s]", cctx ? "" : "un", engn->id, engine->subdev.name);
62 engn->func->bind(engn, cctx, chan);
77 struct nvkm_engn *engn = cctx->vctx->ectx->engn; local
80 CHAN_TRACE(chan, "dtor cctx %d[%s]", engn->id, engn
92 nvkm_chan_cctx_get(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx **pcctx, struct nvkm_client *client) argument
315 struct nvkm_engn *engn; local
336 struct nvkm_engn *engn; local
[all...]
H A Dgk20a.c41 .engn = &gk104_engn,
H A Dga102.c36 .engn = &ga100_engn,
H A Dbase.c42 struct nvkm_engn *engn; local
45 nvkm_runl_foreach_engn(engn, runl) {
46 if (engn->engine == engine)
47 return engn->func->chsw ? engn->func->chsw(engn) : false;
78 if (oclass->engn == &fifo->func->cgrp.user)
81 if (oclass->engn == &fifo->func->chan.user)
105 oclass->engn = &fifo->func->cgrp.user;
115 oclass->engn
173 struct nvkm_engn *engn; local
247 struct nvkm_engn *engn; local
[all...]
H A Dtu102.c137 tu102_fifo_intr_ctxsw_timeout_info(struct nvkm_engn *engn, u32 info) argument
139 struct nvkm_runl *runl = engn->runl;
144 ENGN_DEBUG(engn, "CTXSW_TIMEOUT %08x", info);
173 struct nvkm_engn *engn; local
178 nvkm_runl_foreach_engn_cond(engn, runl, engm & BIT(engn->id)) {
179 info = nvkm_rd32(device, 0x003200 + (engn->id * 4));
180 tu102_fifo_intr_ctxsw_timeout_info(engn, info);
276 .engn = &gv100_engn,
H A Dg84.c106 g84_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
113 switch (engn->engine->subdev.type) {
130 save = nvkm_mask(device, 0x002520, 0x0000003f, BIT(engn->id - 1));
200 nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0);
201 nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MPEG, 0);
202 nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_ME, 0);
203 nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_VP, 0);
204 nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_CIPHER, 0);
205 nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_BSP, 0);
220 .engn
[all...]
H A Dgm200.c55 .engn = &gk104_engn,
H A Dga100.c123 ga100_engn_cxid(struct nvkm_engn *engn, bool *cgid) argument
125 struct nvkm_runl *runl = engn->runl;
127 u32 stat = nvkm_rd32(device, runl->addr + 0x200 + engn->id * 0x40);
129 ENGN_DEBUG(engn, "status %08x", stat);
138 if (nvkm_engine_chsw_load(engn->engine))
150 ga100_engn_nonstall(struct nvkm_engn *engn) argument
152 struct nvkm_engine *engine = engn->engine;
334 struct nvkm_engn *engn; local
347 nvkm_runl_foreach_engn_cond(engn, runl, stat & BIT(engn
445 struct nvkm_engn *engn; local
550 struct nvkm_engn *engn = list_first_entry(&runl->engns, typeof(*engn), head); local
[all...]
H A Drunl.h120 #define nvkm_runl_find_engn(engn,runl,cond) nvkm_list_find(engn, &(runl)->engns, head, (cond))
125 #define nvkm_runl_foreach_engn(engn,runl) list_for_each_entry((engn), &(runl)->engns, head)
126 #define nvkm_runl_foreach_engn_cond(engn,runl,cond) \
127 nvkm_list_foreach(engn, &(runl)->engns, head, (cond))
H A Dr535.c83 struct nvkm_engn *engn; local
97 nvkm_runl_foreach_engn(engn, chan->cgrp->runl) {
98 eT = engn->id;
348 r535_engn_nonstall(struct nvkm_engn *engn) argument
350 struct nvkm_subdev *subdev = &engn->engine->subdev;
364 r535_gr_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) argument
385 r535_flcn_bind(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) argument
400 ctrl->engineType = engn->id;
407 r535_flcn_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) argument
411 if (WARN_ON(!engn
511 struct nvkm_engn *engn; local
541 struct nvkm_engn *engn; local
[all...]
H A Dnv40.c111 nv40_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan) argument
115 u32 context = chan->id << 23 | engn->id << 20;
125 nv40_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
133 switch (engn->engine->subdev.type) {
241 .engn = &nv40_engn,
H A Dgv100.c92 gv100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
117 gv100_ectx_ce_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
129 gv100_ectx_ce_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx) argument
459 struct nvkm_engn *engn; local
462 nvkm_runl_foreach_engn_cond(engn, runl, engm & BIT(engn->id))
463 nvkm_runl_rc_engn(runl, engn);
481 .engn = &gv100_engn,
H A Dgk208.c66 .engn = &gk104_engn,
H A Dgk104.c134 gk104_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
139 switch (engn->engine->subdev.type) {
153 if (!engn->engine->subdev.inst)
178 gk104_ectx_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx) argument
204 gk104_engn_status(struct nvkm_engn *engn, struct gk104_engn_status *status) argument
206 u32 stat = nvkm_rd32(engn->runl->fifo->engine.subdev.device, 0x002640 + (engn->id * 0x08));
221 if (nvkm_engine_chsw_load(engn->engine))
236 ENGN_DEBUG(engn, "%08x: busy %d faulted %d chsw %d save %d load %d %sid %d%s-> %sid %d%s",
245 gk104_engn_cxid(struct nvkm_engn *engn, boo argument
259 gk104_engn_chsw(struct nvkm_engn *engn) argument
[all...]
H A Dcgrp.h20 struct nvkm_engn *engn; member in struct:nvkm_ectx
H A Dnv10.c102 .engn = &nv04_engn,
H A Dnv50.c42 nv50_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan) argument
44 return nvkm_ramht_insert(chan->ramht, eobj, 0, 4, eobj->handle, engn->id << 20);
150 nv50_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
157 switch (engn->engine->subdev.type) {
387 .engn = &nv50_engn,
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Doclass.h22 const void *engn; member in struct:nvkm_oclass
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dbase.c54 const struct nvkm_sw_chan_sclass *sclass = oclass->engn;
66 oclass->engn = &sw->func->sclass[index];
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/dma/
H A Dbase.c74 sclass->engn = oclass;

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