History log of /linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c
Revision Date Author Comments
# 06db7fde 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add new channel classes

Exposes a bunch of the new features that became possible as a result
of the earlier commits. DRM will build on this in the future to add
support for features such as SCG ("async compute") and multi-device
rendering, as part of the work necessary to be able to write a half-
decent vulkan driver - finally.

For the moment, this just crudely ports DRM to the API changes.

- channel class interfaces now the same for all HW classes
- channel group class exposed (SCG)
- channel runqueue selector exposed (SCG)
- channel sub-device id control exposed (multi-device rendering)
- channel names in logging will reflect creating process, not fd owner
- explicit USERD allocation required by VOLTA_CHANNEL_GPFIFO_A and newer
- drm is smarter about determining the appropriate channel class to use

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 8ab849d6 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add new engine context handling

Builds on the context tracking that was added earlier.

- marks engine context PTEs as 'priv' where possible

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# b084fff2 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add common runlist control

- less dependence on waiting for runlist updates, on GPUs that allow it
- supports runqueue selector in RAMRL entries
- completes switch to common runl/cgrp/chan topology info

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 4d60100a 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add common channel recovery

That sure was fun to untangle.

- handled per-runlist, rather than globally
- more straight-forward process in general
- various potential SW/HW races have been fixed
- fixes lockdep issues that were present in >=gk104's prior implementation
- volta recovery now actually stands a chance of working
- volta/turing waiting for PBDMA idle before engine reset
- turing using hw-provided TSG info for CTXSW_TIMEOUT

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# e43c872c 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: merge mmu fault handlers together

After updating GF100 implementation from the GK104/TU102 ones, and using
the new runlist/engine topology info, all three handlers become (almost)
identical.

- there's a temporary kludge to call through to the HW-specific recovery
- engine fault mapping info determined at load time, not on every fault

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 87c86024 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: move PBDMA init to runq

- bumps pbdma timeout to value RM uses on newer HW
- bumps fb timeout to max from boot default
- one/both of these greatly improves stability on // piglit runs

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 965c41d9 02-Oct-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: tidy global PBDMA init

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# d67f3b96 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: tidy up non-stall intr handling

- removes a layer of indirection in the intr handling
- prevents non-stall ctrl racing with unknown intrs

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 0fc72ee9 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: use runlist engine info to lookup engine classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 6de12538 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: expose runlist topology info on all chipsets

Previously only available from Kepler onwards.

- also fixes the info() queries causing fifo init()/fini() unnecessarily

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# d94470e9 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add common runlist/engine topology

Creates an nvkm_runl for each runlist on the GPU, and an nvkm_engn for
each engine that is reachable from a runlist.

- basically what gk104- already does, but extended to all chips
- adds per-runlist CHID allocators (Ampere)
- splits g98/gt2xx out from g84 (different target engines)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 1c488ba9 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add runq

Creates an nvkm_runq for each PBDMA, these will be associated with the
relevant runlist(s) later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 800ac1f8 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add chid allocator

We need to be able to allocate TSG IDs as well as channel IDs, also,
Ampere has per-runlist channel IDs.

- holds per-ID private data, which will be used for/to protect lookup
- holds an nvkm_event which will be used for events tied to IDs
- not used yet beyond setup, and switching use of "fifo->nr - 1" for
channel ID mask to "chid->mask"

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 9be9c606 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: merge gk104_fifo_func into nvkm_host_func

This makes it easier to transition everything.

- a couple of function renames for collisions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# f5e45689 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: unify handling of channel classes

Adds the basic skeleton for common channel (group) interfaces.

- common behaviour between <gk104 and >=gk104 impl's
- separates priv/user channel objects
- passthrough to existing object for now, kludges removed later

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# 8c18138c 01-Jun-2022 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add chid_nr()

- reads channel count from GPU from gm200 onwards
- removes gm20b/gp10b (they become identical to gm200/gp100)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# ab0db2bd 03-Dec-2020 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>


# cde54021 12-Jun-2019 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: fix parsing of mmu fault data

Pascal was particularly incorrect, as the register changed to be more in the
same format as the MMU fault buffers are.

Shouldn't have impacted much more than confusing MMU fault log messages.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# fb80ad15 10-Dec-2018 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: group pbdma functions together

We're about to be adding more of them.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# 79bb4b61 08-May-2018 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# 8c4e9f9d 08-May-2018 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk110-: support writing channel group runlist entries

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# 66587083 08-May-2018 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: add interfaces to support different runlist layouts

This will be required to support features on newer hardware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# f9360c3a 08-May-2018 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: simplify definition of channel classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# ddc669e2 08-May-2018 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevs

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# 91419acf 08-Apr-2016 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: abstract mmu fault data structures

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# 98ac3f06 08-Apr-2016 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: subclass func

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# 13de7f46 19-Aug-2015 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# 05c7145d 13-Jan-2015 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: namespace + nvidia gpu names (no binary change)

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>


# c39f472e 13-Jan-2015 Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes)

The symlinks were annoying some people, and they're not used anywhere
else in the kernel tree. The include directory structure has been
changed so that symlinks aren't needed anymore.

NVKM has been moved from core/ to nvkm/ to make it more obvious as to
what the directory is for, and as some minor prep for when NVKM gets
split out into its own module (virt) at a later date.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>