1/*
2 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#include "priv.h"
23
24#include <nvif/class.h>
25
26static const struct nvkm_fifo_func
27gk20a_fifo = {
28	.chid_nr = nv50_fifo_chid_nr,
29	.chid_ctor = gk110_fifo_chid_ctor,
30	.runq_nr = gf100_fifo_runq_nr,
31	.runl_ctor = gk104_fifo_runl_ctor,
32	.init = gk104_fifo_init,
33	.init_pbdmas = gk104_fifo_init_pbdmas,
34	.intr = gk104_fifo_intr,
35	.intr_mmu_fault_unit = gf100_fifo_intr_mmu_fault_unit,
36	.intr_ctxsw_timeout = gf100_fifo_intr_ctxsw_timeout,
37	.mmu_fault = &gk104_fifo_mmu_fault,
38	.nonstall = &gf100_fifo_nonstall,
39	.runl = &gk110_runl,
40	.runq = &gk208_runq,
41	.engn = &gk104_engn,
42	.engn_ce = &gk104_engn_ce,
43	.cgrp = {{                               }, &gk110_cgrp },
44	.chan = {{ 0, 0, KEPLER_CHANNEL_GPFIFO_A }, &gk110_chan },
45};
46
47int
48gk20a_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
49	       struct nvkm_fifo **pfifo)
50{
51	return nvkm_fifo_new_(&gk20a_fifo, device, type, inst, pfifo);
52}
53