/linux-master/drivers/gpu/drm/i915/gvt/ |
H A D | scheduler.h | 148 intel_engine_mask_t engine_mask); 153 intel_engine_mask_t engine_mask, 167 intel_engine_mask_t engine_mask);
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H A D | vgpu.c | 410 * @engine_mask: engines to reset for GT reset 429 * The parameter engine_mask is to specific the engines that need to be 430 * resetted. If value ALL_ENGINES is given for engine_mask, it means 432 * GPU engines. For FLR, engine_mask is ignored. 435 intel_engine_mask_t engine_mask) 439 intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask; 442 gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n", 443 vgpu->id, dmlr, engine_mask); 460 if (engine_mask == ALL_ENGINES || dmlr) { 462 if (engine_mask 434 intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr, intel_engine_mask_t engine_mask) argument [all...] |
H A D | execlist.c | 523 intel_engine_mask_t engine_mask) 529 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) { 537 intel_engine_mask_t engine_mask) 542 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) 547 intel_engine_mask_t engine_mask) 549 reset_execlist(vgpu, engine_mask); 522 clean_execlist(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask) argument 536 reset_execlist(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask) argument 546 init_execlist(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask) argument
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H A D | gvt.h | 145 int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask); 146 void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask); 147 void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask); 500 intel_engine_mask_t engine_mask);
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H A D | scheduler.c | 1048 intel_engine_mask_t engine_mask) 1056 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) { 1337 * @engine_mask: engines expected to be reset 1343 intel_engine_mask_t engine_mask) 1350 intel_vgpu_clean_workloads(vgpu, engine_mask); 1351 s->ops->reset(vgpu, engine_mask); 1457 * @engine_mask: either ALL_ENGINES or target engine mask 1467 intel_engine_mask_t engine_mask, 1482 interface == 0 && engine_mask != ALL_ENGINES)) 1486 s->ops->clean(vgpu, engine_mask); 1047 intel_vgpu_clean_workloads(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask) argument 1342 intel_vgpu_reset_submission(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask) argument 1466 intel_vgpu_select_submission_ops(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask, unsigned int interface) argument [all...] |
/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_breadcrumbs_types.h | 50 intel_engine_mask_t engine_mask; member in struct:intel_breadcrumbs
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H A D | intel_reset.c | 159 intel_engine_mask_t engine_mask, 188 intel_engine_mask_t engine_mask, 198 intel_engine_mask_t engine_mask, 234 static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, argument 322 intel_engine_mask_t engine_mask, 328 if (engine_mask == ALL_ENGINES) { 334 for_each_engine_masked(engine, gt, engine_mask, tmp) { 343 intel_engine_mask_t engine_mask, 350 ret = __gen6_reset_engines(gt, engine_mask, retry); 523 intel_engine_mask_t engine_mask, 158 i915_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) argument 187 g33_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) argument 197 g4x_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) argument 321 __gen6_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) argument 342 gen6_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) argument 522 __gen11_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) argument 611 gen8_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) argument 707 needs_wa_14015076503(struct intel_gt *gt, intel_engine_mask_t engine_mask) argument 719 wa_14015076503_start(struct intel_gt *gt, intel_engine_mask_t engine_mask, bool first) argument 757 wa_14015076503_end(struct intel_gt *gt, intel_engine_mask_t engine_mask) argument 767 __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask) argument 1351 intel_gt_reset_global(struct intel_gt *gt, u32 engine_mask, const char *reason) argument 1392 intel_gt_handle_error(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned long flags, const char *fmt, ...) argument [all...] |
H A D | intel_reset.h | 26 intel_engine_mask_t engine_mask, 57 int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
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H A D | intel_gt_types.h | 254 intel_engine_mask_t engine_mask; member in struct:intel_gt::intel_gt_info 298 intel_engine_mask_t engine_mask; member in struct:intel_gt_definition
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H A D | intel_gt.h | 145 intel_engine_mask_t engine_mask); 189 for ((tmp__) = (mask__) & (gt__)->info.engine_mask; \
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H A D | intel_engine_cs.c | 789 gt->info.engine_mask &= ~BIT(_VCS(i)); 808 gt->info.engine_mask &= ~BIT(_VECS(i)); 837 info->engine_mask &= ~BIT(_CCS(i)); 865 if (mask & info->engine_mask) { 869 info->engine_mask &= ~mask; 888 GEM_BUG_ON(!info->engine_mask); 906 if (__HAS_ENGINE(info->engine_mask, GSC0) && !intel_uc_wants_gsc_uc(>->uc)) { 908 info->engine_mask &= ~BIT(GSC0); 923 info->engine_mask &= ~GENMASK(CCS3, CCS0); 925 info->engine_mask | 983 const unsigned int engine_mask = init_engine_mask(gt); local [all...] |
H A D | intel_gt.c | 244 intel_engine_mask_t engine_mask) 296 for_each_engine_masked(engine, gt, engine_mask, id) 924 gt->info.engine_mask = INTEL_INFO(i915)->platform_engine_mask; 946 gt->info.engine_mask = gtdef->engine_mask; 1006 drm_printf(p, "available engines: %x\n", info->engine_mask); 243 intel_gt_clear_error_registers(struct intel_gt *gt, intel_engine_mask_t engine_mask) argument
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/linux-master/drivers/gpu/drm/xe/ |
H A D | xe_hw_engine.c | 438 if (!(gt->info.engine_mask & BIT(id))) 487 xe_gt_assert(gt, gt->info.engine_mask & BIT(id)); 576 if (!(gt->info.engine_mask & BIT(i))) 580 gt->info.engine_mask &= ~BIT(i); 586 if (!(gt->info.engine_mask & BIT(i))) 590 gt->info.engine_mask &= ~BIT(i); 611 if (!(gt->info.engine_mask & BIT(i))) 615 gt->info.engine_mask &= ~BIT(i); 629 if (hweight64(gt->info.engine_mask & 638 if (!(gt->info.engine_mask [all...] |
H A D | xe_gt.h | 19 #define CCS_MASK(gt) (((gt)->info.engine_mask & XE_HW_ENGINE_CCS_MASK) >> XE_HW_ENGINE_CCS0)
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H A D | xe_force_wake.c | 80 if (!(gt->info.engine_mask & BIT(i))) 91 if (!(gt->info.engine_mask & BIT(i))) 101 if (gt->info.engine_mask & BIT(XE_HW_ENGINE_GSCCS0))
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H A D | xe_gt_types.h | 112 /** @info.engine_mask: mask of engines present on GT */ 113 u64 engine_mask; member in struct:xe_gt::__anon89 116 * xe_pci.c, used to fake reading the engine_mask from the
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H A D | xe_debugfs.c | 62 drm_printf(&p, "gt%d engine_mask 0x%llx\n", id, 63 gt->info.engine_mask);
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H A D | xe_ring_ops.c | 166 bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK); 317 bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
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H A D | xe_rtp.c | 305 u64 render_compute_mask = gt->info.engine_mask &
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/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_gpu_error.h | 276 intel_engine_mask_t engine_mask); 279 intel_engine_mask_t engine_mask) 290 intel_engine_mask_t engine_mask, u32 dump_flags); 352 i915_capture_error_state(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) argument 278 intel_klog_error_capture(struct intel_gt *gt, intel_engine_mask_t engine_mask) argument
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/linux-master/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_gsc_uc.c | 108 GEM_BUG_ON(!gt_is_root(gt) && !gt->info.engine_mask); 113 mask = gt->info.engine_mask;
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H A D | intel_huc.c | 257 intel_engine_mask_t mask = gt->info.engine_mask; 268 GEM_BUG_ON(!gt_is_root(gt) && !gt->info.engine_mask); 273 mask = gt->info.engine_mask;
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_umsch_mm.h | 49 uint32_t engine_mask; member in struct:umsch_mm_set_resource_input 161 uint32_t engine_mask; member in struct:amdgpu_umsch_mm
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/linux-master/drivers/net/wireless/mediatek/mt76/ |
H A D | mt76x02_dfs.c | 617 u32 engine_mask; local 641 engine_mask = mt76_rr(dev, MT_BBP(DFS, 1)); 642 if (!(engine_mask & 0xf)) 648 if (!(engine_mask & (1 << i)))
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/linux-master/drivers/gpu/drm/i915/selftests/ |
H A D | mock_gem_device.c | 231 to_gt(i915)->info.engine_mask = BIT(0);
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