Searched refs:dep_bit (Results 1 - 12 of 12) sorted by relevance

/linux-master/arch/arm/mach-omap2/
H A Dclockdomains2xxx_3xxx_data.c15 * dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really just
21 * The overly-specific dep_bit names are due to a bit name collision
25 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
91 .dep_bit = OMAP_EN_WKUP_SHIFT,
H A Dclockdomains7xx_data.c318 .dep_bit = DRA7XX_L4PER3_STATDEP_SHIFT,
328 .dep_bit = DRA7XX_L4PER2_STATDEP_SHIFT,
349 .dep_bit = DRA7XX_IVA_STATDEP_SHIFT,
370 .dep_bit = DRA7XX_IPU1_STATDEP_SHIFT,
382 .dep_bit = DRA7XX_IPU2_STATDEP_SHIFT,
394 .dep_bit = DRA7XX_L3INIT_STATDEP_SHIFT,
406 .dep_bit = DRA7XX_L4SEC_STATDEP_SHIFT,
418 .dep_bit = DRA7XX_L3MAIN1_STATDEP_SHIFT,
428 .dep_bit = DRA7XX_VPE_STATDEP_SHIFT,
460 .dep_bit
[all...]
H A Dclockdomains2430_data.c14 * referenced by a wkdep_srcs must have a dep_bit assigned. So
21 * The overly-specific dep_bit names are due to a bit name collision
25 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
103 .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
112 .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
134 .dep_bit = OMAP24XX_EN_CORE_SHIFT,
148 .dep_bit = OMAP24XX_EN_CORE_SHIFT,
H A Dclockdomains44xx_data.c168 .dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT,
178 .dep_bit = OMAP4430_TESLA_STATDEP_SHIFT,
190 .dep_bit = OMAP4430_GFX_STATDEP_SHIFT,
202 .dep_bit = OMAP4430_IVAHD_STATDEP_SHIFT,
214 .dep_bit = OMAP4430_L4SEC_STATDEP_SHIFT,
226 .dep_bit = OMAP4430_L4PER_STATDEP_SHIFT,
236 .dep_bit = OMAP4430_ABE_STATDEP_SHIFT,
254 .dep_bit = OMAP4430_L3INIT_STATDEP_SHIFT,
295 .dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT,
314 .dep_bit
[all...]
H A Dclockdomains54xx_data.c170 .dep_bit = OMAP54XX_L4SEC_STATDEP_SHIFT,
182 .dep_bit = OMAP54XX_IVA_STATDEP_SHIFT,
205 .dep_bit = OMAP54XX_L3MAIN2_STATDEP_SHIFT,
215 .dep_bit = OMAP54XX_L3MAIN1_STATDEP_SHIFT,
234 .dep_bit = OMAP54XX_IPU_STATDEP_SHIFT,
246 .dep_bit = OMAP54XX_L4CFG_STATDEP_SHIFT,
256 .dep_bit = OMAP54XX_ABE_STATDEP_SHIFT,
266 .dep_bit = OMAP54XX_DSS_STATDEP_SHIFT,
278 .dep_bit = OMAP54XX_DSP_STATDEP_SHIFT,
301 .dep_bit
[all...]
H A Dclockdomains3xxx_data.c15 * dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really just
19 * The overly-specific dep_bit names are due to a bit name collision
23 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
226 .dep_bit = OMAP3430_EN_MPU_SHIFT,
235 .dep_bit = OMAP3430_EN_MPU_SHIFT,
252 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
307 .dep_bit = OMAP3430_EN_CORE_SHIFT,
320 .dep_bit = OMAP3430_EN_CORE_SHIFT,
329 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
339 .dep_bit
[all...]
H A Dprm2xxx_3xxx.c198 omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
206 omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
215 PM_WKDEP, (1 << clkdm2->dep_bit));
229 mask |= 1 << cd->clkdm->dep_bit;
H A Dclockdomains2420_data.c14 * referenced by a wkdep_srcs must have a dep_bit assigned. So
21 * The overly-specific dep_bit names are due to a bit name collision
25 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
91 .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
H A Dcminst44xx.c353 omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit),
363 omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit),
377 (1 << clkdm2->dep_bit));
392 mask |= 1 << cd->clkdm->dep_bit;
H A Dcm3xxx.c149 omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
158 omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
169 (1 << clkdm2->dep_bit));
181 mask |= 1 << cd->clkdm->dep_bit;
H A Dclockdomain.h107 * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit
132 const u8 dep_bit; member in struct:clockdomain
/linux-master/drivers/gpu/drm/amd/pm/swsmu/
H A Dsmu_cmn.c643 uint8_t dep_bit = 0; local
645 for_each_set_bit(dep_bit, &dep_status, 32)
646 indep_status |= 1ULL << throttler_map[dep_bit];

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