1// SPDX-License-Identifier: GPL-2.0
2/*
3 * OMAP2xxx clockdomains
4 *
5 * Copyright (C) 2008-2009 Texas Instruments, Inc.
6 * Copyright (C) 2008-2010 Nokia Corporation
7 *
8 * Paul Walmsley, Jouni H��gander
9 *
10 * This file contains clockdomains and clockdomain wakeup dependencies
11 * for OMAP2xxx chips.  Some notes:
12 *
13 * A useful validation rule for struct clockdomain: Any clockdomain
14 * referenced by a wkdep_srcs must have a dep_bit assigned.  So
15 * wkdep_srcs are really just software-controllable dependencies.
16 * Non-software-controllable dependencies do exist, but they are not
17 * encoded below (yet).
18 *
19 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
20 *
21 * The overly-specific dep_bit names are due to a bit name collision
22 * with CM_FCLKEN_{DSP,IVA2}.  The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
23 * value are the same for all powerdomains: 2
24 *
25 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
26 * sanity check?
27 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
28 */
29
30/*
31 * To-Do List
32 * -> Port the Sleep/Wakeup dependencies for the domains
33 *    from the Power domain framework
34 */
35
36#include <linux/kernel.h>
37#include <linux/io.h>
38
39#include "soc.h"
40#include "clockdomain.h"
41#include "prm2xxx_3xxx.h"
42#include "cm2xxx_3xxx.h"
43#include "cm-regbits-24xx.h"
44#include "prm-regbits-24xx.h"
45
46/*
47 * Clockdomain dependencies for wkdeps
48 *
49 * XXX Hardware dependencies (e.g., dependencies that cannot be
50 * changed in software) are not included here yet, but should be.
51 */
52
53/* Wakeup dependency source arrays */
54
55/* 2430-specific possible wakeup dependencies */
56
57/* 2430 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP, MDM */
58static struct clkdm_dep core_2430_wkdeps[] = {
59	{ .clkdm_name = "dsp_clkdm" },
60	{ .clkdm_name = "gfx_clkdm" },
61	{ .clkdm_name = "mpu_clkdm" },
62	{ .clkdm_name = "wkup_clkdm" },
63	{ .clkdm_name = "mdm_clkdm" },
64	{ NULL },
65};
66
67/* 2430 PM_WKDEP_MPU: CORE, DSP, WKUP, MDM */
68static struct clkdm_dep mpu_2430_wkdeps[] = {
69	{ .clkdm_name = "core_l3_clkdm" },
70	{ .clkdm_name = "core_l4_clkdm" },
71	{ .clkdm_name = "dsp_clkdm" },
72	{ .clkdm_name = "wkup_clkdm" },
73	{ .clkdm_name = "mdm_clkdm" },
74	{ NULL },
75};
76
77/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */
78static struct clkdm_dep mdm_2430_wkdeps[] = {
79	{ .clkdm_name = "core_l3_clkdm" },
80	{ .clkdm_name = "core_l4_clkdm" },
81	{ .clkdm_name = "mpu_clkdm" },
82	{ .clkdm_name = "wkup_clkdm" },
83	{ NULL },
84};
85
86/*
87 * 2430-only clockdomains
88 */
89
90static struct clockdomain mpu_2430_clkdm = {
91	.name		= "mpu_clkdm",
92	.pwrdm		= { .name = "mpu_pwrdm" },
93	.flags		= CLKDM_CAN_HWSUP_SWSUP,
94	.wkdep_srcs	= mpu_2430_wkdeps,
95	.clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
96};
97
98/* Another case of bit name collisions between several registers: EN_MDM */
99static struct clockdomain mdm_clkdm = {
100	.name		= "mdm_clkdm",
101	.pwrdm		= { .name = "mdm_pwrdm" },
102	.flags		= CLKDM_CAN_HWSUP_SWSUP,
103	.dep_bit	= OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
104	.wkdep_srcs	= mdm_2430_wkdeps,
105	.clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
106};
107
108static struct clockdomain dsp_2430_clkdm = {
109	.name		= "dsp_clkdm",
110	.pwrdm		= { .name = "dsp_pwrdm" },
111	.flags		= CLKDM_CAN_HWSUP_SWSUP,
112	.dep_bit	= OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
113	.wkdep_srcs	= dsp_24xx_wkdeps,
114	.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
115};
116
117static struct clockdomain gfx_2430_clkdm = {
118	.name		= "gfx_clkdm",
119	.pwrdm		= { .name = "gfx_pwrdm" },
120	.flags		= CLKDM_CAN_HWSUP_SWSUP,
121	.wkdep_srcs	= gfx_24xx_wkdeps,
122	.clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
123};
124
125/*
126 * XXX add usecounting for clkdm dependencies, otherwise the presence
127 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
128 * could cause trouble
129 */
130static struct clockdomain core_l3_2430_clkdm = {
131	.name		= "core_l3_clkdm",
132	.pwrdm		= { .name = "core_pwrdm" },
133	.flags		= CLKDM_CAN_HWSUP,
134	.dep_bit	= OMAP24XX_EN_CORE_SHIFT,
135	.wkdep_srcs	= core_2430_wkdeps,
136	.clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
137};
138
139/*
140 * XXX add usecounting for clkdm dependencies, otherwise the presence
141 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
142 * could cause trouble
143 */
144static struct clockdomain core_l4_2430_clkdm = {
145	.name		= "core_l4_clkdm",
146	.pwrdm		= { .name = "core_pwrdm" },
147	.flags		= CLKDM_CAN_HWSUP,
148	.dep_bit	= OMAP24XX_EN_CORE_SHIFT,
149	.wkdep_srcs	= core_2430_wkdeps,
150	.clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
151};
152
153static struct clockdomain dss_2430_clkdm = {
154	.name		= "dss_clkdm",
155	.pwrdm		= { .name = "core_pwrdm" },
156	.flags		= CLKDM_CAN_HWSUP,
157	.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
158};
159
160static struct clockdomain *clockdomains_omap243x[] __initdata = {
161	&wkup_common_clkdm,
162	&mpu_2430_clkdm,
163	&mdm_clkdm,
164	&dsp_2430_clkdm,
165	&gfx_2430_clkdm,
166	&core_l3_2430_clkdm,
167	&core_l4_2430_clkdm,
168	&dss_2430_clkdm,
169	NULL,
170};
171
172void __init omap243x_clockdomains_init(void)
173{
174	if (!cpu_is_omap243x())
175		return;
176
177	clkdm_register_platform_funcs(&omap2_clkdm_operations);
178	clkdm_register_clkdms(clockdomains_omap243x);
179	clkdm_complete_init();
180}
181
182