Searched refs:debug (Results 1 - 25 of 1600) sorted by relevance

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/u-boot/arch/x86/lib/fsp2/
H A Dfsp_common.c18 debug("Calling into FSP (notify phase INIT_PHASE_END_FIRMWARE): ");
21 debug("fail, error code %x\n", status);
23 debug("OK\n");
/u-boot/board/theobroma-systems/ringneck_px30/
H A Dringneck-px30.c36 debug("Failed to request STM32_RST\n");
42 debug("Failed to request STM32_BOOT\n");
49 debug("Failed to configure STM32_BOOT as input\n");
55 debug("Failed to configure STM32_RST as output low\n");
63 debug("Failed to configure STM32_RST as input\n");
/u-boot/arch/arm/mach-uniphier/debug-uart/
H A DMakefile4 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o
5 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o
7 obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o
8 obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o
9 obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o
12 obj-y += debug-uart.o
/u-boot/arch/x86/cpu/intel_common/
H A Dme_status.c140 debug("ME: FW Partition Table : %s\n",
142 debug("ME: Bringup Loader Failure : %s\n",
144 debug("ME: Firmware Init Complete : %s\n",
146 debug("ME: Manufacturing Mode : %s\n",
148 debug("ME: Boot Options Present : %s\n",
150 debug("ME: Update In Progress : %s\n",
152 debug("ME: Current Working State : %s\n",
154 debug("ME: Current Operation State : %s\n",
156 debug("ME: Current Operation Mode : %s\n",
158 debug("M
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/u-boot/drivers/usb/dwc3/
H A Dlinux-compat.h14 #define dev_WARN(dev, format, arg...) debug(format, ##arg)
/u-boot/lib/
H A Dfdtdec_common.c18 #define debug(...) macro
27 debug("%s: %s: ", __func__, prop_name);
32 debug("%#x (%d)\n", val, val);
35 debug("(not found)\n");
45 debug("%s: %s: ", __func__, prop_name);
50 debug("%#x (%d)\n", val, val);
53 debug("(not found)\n");
/u-boot/board/theobroma-systems/common/
H A Dcommon.c29 debug("%s: /chosen/u-boot,spl-boot-device not set\n",
33 debug("%s: booted from %s\n", __func__, boot_device);
40 debug("%s: boot_targets does not exist\n", __func__);
43 debug("%s: boot_targets current: %s - default: %s\n",
47 debug("%s: boot_targets not default, don't change it\n",
60 debug("%s: not reordering boot_targets, bootdev %s != MMC\n",
71 debug("%s: only one mmc boot_target found\n", __func__);
85 debug("%s: set boot_targets to: %s\n", __func__, env);
102 debug("%s: /chosen/u-boot,spl-boot-device not set\n",
107 debug("
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/u-boot/arch/x86/lib/
H A Dacpi.c16 debug("Looking on %p for valid checksum\n", rsdp);
20 debug("acpi rsdp checksum 1 passed\n");
25 debug("acpi rsdp checksum 2 passed\n");
48 debug("RSDP found at %p\n", rsdp);
52 debug("RSDT found at %p ends at %p\n", rsdt, end);
64 debug("FADT found at %p\n", fadt);
73 debug("Trying to find the wakeup vector...\n");
78 debug("No FACS found, wake up from S3 not possible.\n");
82 debug("FACS found at %p\n", facs);
84 debug("O
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/u-boot/board/broadcom/bcmstb/
H A Dbcmstb.c105 debug("Arguments from prior stage bootloader:\n");
106 debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0);
107 debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1);
108 debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2);
109 debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3);
110 debug("Stack Pointer Register: 0x%x\n", bcmstb_boot_parameters.sp);
111 debug("Link Register: 0x%x\n", bcmstb_boot_parameters.lr);
112 debug("Assuming timer frequency register at: 0x%p\n",
114 debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz);
115 debug("Prio
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/u-boot/arch/mips/mach-bmips/
H A Ddram.c23 debug("DRAM init failed: %d\n", err);
29 debug("Cannot get DRAM size: %d\n", err);
33 debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size);
/u-boot/arch/arm/mach-kirkwood/
H A Dmpp.c26 debug("MPP setup: unknown kirkwood variant\n");
44 debug( "initial MPP regs:");
47 debug(" %08x", mpp_ctrl[i]);
49 debug("\n");
59 debug("kirkwood_mpp_conf: invalid MPP "
64 debug("kirkwood_mpp_conf: requested MPP%u config "
83 debug(" final MPP regs:");
86 debug(" %08x", mpp_ctrl[i]);
88 debug("\n");
/u-boot/arch/arm/mach-socfpga/
H A Dwrap_handoff_soc64.c33 debug("%s: umctl2 handoff data\n", __func__);
36 debug("%s: PHY handoff data\n", __func__);
39 debug("%s: PHY engine handoff data\n", __func__);
43 debug("%s: Unknown endianness!!\n", __func__);
57 debug("%s: Cannot find HANDOFF MAGIC ", __func__);
58 debug("at addr 0x%p\n", (u32 *)handoff_address);
82 debug("%s: handoff address = 0x%p handoff size = 0x%08x\n", __func__,
104 debug("%s: Handoff addr = 0x%p ", __func__, (u32 *)handoff_address);
105 debug("Handoff table address = 0x%p ", table_x32);
106 debug("tabl
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/u-boot/arch/x86/lib/fsp/
H A Dfsp_common.c40 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
43 debug("fail, error code %x\n", status);
45 debug("OK\n");
55 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
58 debug("fail, error code %x\n", status);
60 debug("OK\n");
74 debug("Cannot find RTC: err=%d\n", ret);
81 debug("Save stack address to CMOS: err=%d\n", ret);
/u-boot/arch/arm/mach-tegra/tegra124/
H A Dcpu.c30 debug("%s entry\n", __func__);
55 debug("%s entry\n", __func__);
60 debug("%s: PLLX base = 0x%08X\n", __func__, reg);
63 debug("%s: PLLX locked, delay for stable clocks\n", __func__);
67 debug("%s: Setting CCLK_BURST and DIVIDER\n", __func__);
71 debug("%s: Enabling clock to all CPUs\n", __func__);
77 debug("%s: Enabling main CPU complex clocks\n", __func__);
83 debug("%s: Done\n", __func__);
91 debug("%s entry\n", __func__);
134 debug("Ra
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/u-boot/drivers/pinctrl/tegra/
H A Dfuncmux-tegra210.c29 debug("%s: invalid periph_id %d", __func__, id);
34 debug("%s: invalid config %d for periph_id %d", __func__,
/u-boot/drivers/mailbox/
H A Dmailbox-uclass.c23 debug("%s(chan=%p)\n", __func__, chan);
26 debug("Invalid args_count: %d\n", args->args_count);
42 debug("%s(dev=%p, index=%d, chan=%p)\n", __func__, dev, index, chan);
47 debug("%s: dev_read_phandle_with_args failed: %d\n", __func__,
54 debug("%s: uclass_get_device_by_of_offset failed: %d\n",
62 debug("%s: mbox node from parent failed: %d\n",
75 debug("of_xlate() failed: %d\n", ret);
82 debug("ops->request() failed: %d\n", ret);
94 debug("%s(dev=%p, name=%s, chan=%p)\n", __func__, dev, name, chan);
98 debug("fdt_stringlist_searc
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/u-boot/drivers/power/domain/
H A Dsandbox-power-domain.c21 debug("%s(power_domain=%p)\n", __func__, power_domain);
31 debug("%s(power_domain=%p)\n", __func__, power_domain);
40 debug("%s(power_domain=%p)\n", __func__, power_domain);
51 debug("%s(power_domain=%p)\n", __func__, power_domain);
60 debug("%s(dev=%p)\n", __func__, dev);
67 debug("%s(dev=%p)\n", __func__, dev);
98 debug("%s(dev=%p, id=%ld)\n", __func__, dev, id);
/u-boot/lib/lzma/
H A DLzmaTools.c53 debug ("LZMA: Image address............... 0x%p\n", inStream);
54 debug ("LZMA: Properties address.......... 0x%p\n", inStream + LZMA_PROPERTIES_OFFSET);
55 debug ("LZMA: Uncompressed size address... 0x%p\n", inStream + LZMA_SIZE_OFFSET);
56 debug ("LZMA: Compressed data address..... 0x%p\n", inStream + LZMA_DATA_OFFSET);
57 debug ("LZMA: Destination address......... 0x%p\n", outStream);
88 debug ("LZMA: 64bit support not enabled.\n");
93 debug("LZMA: Uncompresed size............ 0x%zx\n", outSizeFull);
94 debug("LZMA: Compresed size.............. 0x%zx\n", compressedSize);
114 debug("LZMA: Uncompressed ............... 0x%zx\n", outProcessed);
/u-boot/arch/x86/cpu/broadwell/
H A Drefcode.c82 debug("Extracting code from rmodule at %p\n", hdr);
84 debug("Invalid rmodule magic\n");
88 debug("Link start address must be 0\n");
92 debug("Entry point must be 0\n");
105 debug("Copying refcode from %p to %p, size %x\n", src, dest, size);
109 debug("Zeroing BSS at %p, size %x\n", dest + hdr->bss_begin, size);
113 debug("Running reference code at %p\n", func);
119 debug("Reference code returned %d\n", ret);
122 debug("Refereence code completed\n");
/u-boot/drivers/ddr/fsl/
H A Dmpc85xx_ddr_gen3.c84 debug("Workaround for ERRATUM_DDR111_DDR134\n");
96 debug("Found cs%d_bns (0x%08x) covering 0xff000000, "
183 if (regs->debug[i]) {
184 debug("Write to debug_%d as %08x\n", i+1, regs->debug[i]);
185 out_be32(&ddr->debug[i], regs->debug[i]);
190 out_be32(&ddr->debug[12], 0x00000015);
191 out_be32(&ddr->debug[21], 0x24000000);
213 debug("Workaroun
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/u-boot/drivers/remoteproc/
H A Dti_power_proc.c43 debug("'%s' no dt?\n", dev->name);
49 debug("'%s': no 'reg' property\n", dev->name);
55 debug("'%s': no 'ti,lpsc_module' property\n", dev->name);
80 debug("%s probed with slave_addr=0x%08lX module=%d(%d)\n",
102 debug("%s: no uc pdata!\n", dev->name);
109 debug("%s Unable to disable module '%d'(ret=%d)\n",
114 debug("%s: Loading binary from 0x%08lX, size 0x%08lX to 0x%08lX\n",
119 debug("%s: Complete!\n", uc_pdata->name);
137 debug("%s: no uc pdata!\n", dev->name);
144 debug("
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/u-boot/arch/x86/cpu/slimbootloader/
H A Dslimbootloader.c33 debug("tsc_base=0x%llx\n", gd->arch.tsc_base);
37 debug("performance info hob not found\n");
43 debug("freq=0x%lx\n", gd->arch.clock_rate);
/u-boot/arch/x86/cpu/
H A Dioapic.c27 debug("IOAPIC: Initialising IOAPIC at %08x\n", IO_APIC_ADDR);
28 debug("IOAPIC: Bootstrap Processor Local APIC = %#02x\n", bsp_lapicid);
31 debug("IOAPIC: ID = 0x%02x\n", ioapic_id);
/u-boot/board/dfi/dfi-bt700/
H A Ddfi-bt700.c40 debug("gpio ret=%d\n", ret);
43 debug("gpio_request ret=%d\n", ret);
46 debug("gpio dir ret=%d\n", ret);
/u-boot/drivers/bios_emulator/include/x86emu/
H A Ddebug.h35 * Description: Header file for debug definitions.
65 # define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
66 # define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
67 # define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
68 # define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
69 # define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
70 # define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
71 # define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
72 # define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_CS_IP)
74 # define DEBUG_FS() (M.x86.debug
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