1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2018  Cisco Systems, Inc.
4 * (C) Copyright 2019  Synamedia
5 *
6 * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
7 */
8
9#include <cpu_func.h>
10#include <init.h>
11#include <log.h>
12#include <time.h>
13#include <asm/global_data.h>
14#include <linux/types.h>
15#include <common.h>
16#include <env.h>
17#include <asm/io.h>
18#include <asm/bootm.h>
19#include <mach/timer.h>
20#include <mmc.h>
21#include <fdtdec.h>
22
23DECLARE_GLOBAL_DATA_PTR;
24
25#define BCMSTB_DATA_SECTION __section(".data")
26
27struct bcmstb_boot_parameters bcmstb_boot_parameters BCMSTB_DATA_SECTION;
28
29phys_addr_t prior_stage_fdt_address BCMSTB_DATA_SECTION;
30
31union reg_value_union {
32	const char *data;
33	const phys_addr_t *address;
34};
35
36int board_init(void)
37{
38	return 0;
39}
40
41void reset_cpu(void)
42{
43}
44
45int print_cpuinfo(void)
46{
47	return 0;
48}
49
50int dram_init(void)
51{
52	if (fdtdec_setup_mem_size_base() != 0)
53		return -EINVAL;
54
55	return 0;
56}
57
58int dram_init_banksize(void)
59{
60	fdtdec_setup_memory_banksize();
61
62	/*
63	 * On this SoC, U-Boot is running as an ELF file.  Change the
64	 * relocation address to CONFIG_TEXT_BASE, so that in
65	 * setup_reloc, gd->reloc_off works out to 0, effectively
66	 * disabling relocation.  Otherwise U-Boot hangs in the setup
67	 * instructions just before relocate_code in
68	 * arch/arm/lib/crt0.S.
69	 */
70	gd->relocaddr = CONFIG_TEXT_BASE;
71
72	return 0;
73}
74
75void enable_caches(void)
76{
77	/*
78	 * This port assumes that the prior stage bootloader has
79	 * enabled I-cache and D-cache already.  Implementing this
80	 * function silences the warning in the default function.
81	 */
82}
83
84int timer_init(void)
85{
86	gd->arch.timer_rate_hz = readl(BCMSTB_TIMER_FREQUENCY);
87
88	return 0;
89}
90
91ulong get_tbclk(void)
92{
93	return gd->arch.timer_rate_hz;
94}
95
96uint64_t get_ticks(void)
97{
98	gd->timebase_h = readl(BCMSTB_TIMER_HIGH);
99	gd->timebase_l = readl(BCMSTB_TIMER_LOW);
100
101	return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
102}
103
104int board_late_init(void)
105{
106	debug("Arguments from prior stage bootloader:\n");
107	debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0);
108	debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1);
109	debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2);
110	debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3);
111	debug("Stack Pointer Register:     0x%x\n", bcmstb_boot_parameters.sp);
112	debug("Link Register:              0x%x\n", bcmstb_boot_parameters.lr);
113	debug("Assuming timer frequency register at: 0x%p\n",
114	      (void *)BCMSTB_TIMER_FREQUENCY);
115	debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz);
116	debug("Prior stage provided DTB at: 0x%p\n",
117	      (void *)prior_stage_fdt_address);
118
119	/*
120	 * Set fdtcontroladdr in the environment so that scripts can
121	 * refer to it, for example, to reuse it for fdtaddr.
122	 */
123	env_set_hex("fdtcontroladdr", prior_stage_fdt_address);
124
125	/*
126	 * Do not set machid to the machine identifier value provided
127	 * by the prior stage bootloader (bcmstb_boot_parameters.r1)
128	 * because we're using a device tree to boot Linux.
129	 */
130
131	return 0;
132}
133
134void *board_fdt_blob_setup(int *err)
135{
136	*err = 0;
137	/* Stored the DTB address there during our init */
138	return (void *)prior_stage_fdt_address;
139}
140