1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 4 */ 5 6#include <common.h> 7#include <cpu_func.h> 8#include <dm.h> 9#include <errno.h> 10#include <init.h> 11#include <log.h> 12#include <rtc.h> 13#include <acpi/acpi_s3.h> 14#include <asm/cmos_layout.h> 15#include <asm/early_cmos.h> 16#include <asm/global_data.h> 17#include <asm/io.h> 18#include <asm/mrccache.h> 19#include <asm/post.h> 20#include <asm/processor.h> 21#include <asm/fsp/fsp_support.h> 22 23DECLARE_GLOBAL_DATA_PTR; 24 25int checkcpu(void) 26{ 27 return 0; 28} 29 30int print_cpuinfo(void) 31{ 32 post_code(POST_CPU_INFO); 33 return default_print_cpuinfo(); 34} 35 36int fsp_init_phase_pci(void) 37{ 38 u32 status; 39 40 /* call into FspNotify */ 41 debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); 42 status = fsp_notify(NULL, INIT_PHASE_PCI); 43 if (status) 44 debug("fail, error code %x\n", status); 45 else 46 debug("OK\n"); 47 48 return status ? -EPERM : 0; 49} 50 51void board_final_init(void) 52{ 53 u32 status; 54 55 /* call into FspNotify */ 56 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); 57 status = fsp_notify(NULL, INIT_PHASE_BOOT); 58 if (status) 59 debug("fail, error code %x\n", status); 60 else 61 debug("OK\n"); 62} 63 64#if CONFIG_IS_ENABLED(DM_RTC) 65int fsp_save_s3_stack(void) 66{ 67 struct udevice *dev; 68 int ret; 69 70 if (gd->arch.prev_sleep_state == ACPI_S3) 71 return 0; 72 73 ret = uclass_get_device(UCLASS_RTC, 0, &dev); 74 if (ret) { 75 debug("Cannot find RTC: err=%d\n", ret); 76 return -ENODEV; 77 } 78 79 /* Save the stack address to CMOS */ 80 ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); 81 if (ret) { 82 debug("Save stack address to CMOS: err=%d\n", ret); 83 return -EIO; 84 } 85 86 return 0; 87} 88#endif 89