Searched refs:chip (Results 1 - 25 of 499) sorted by path

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/include/
H A Dbcmdefs.h200 /* Allows size optimization for single-chip image */
202 #define CHIPID(chip) (BCMCHIPID)
204 #define CHIPID(chip) (chip)
H A Dhndnand.h70 uint32 chipidx; /* Current active chip index */
85 int (*select_chip)(hndnand_t *nfl, int chip);
107 int hndnand_select_chip(hndnand_t *nfl, int chip);
108 int hndnand_devcie_width(hndnand_t *nfl, int chip);
H A Dnicpci.h154 ((CHIPID((sih)->chip) == BCM4331_CHIP_ID) && \
H A Dsiutils.h31 * Data structure to export all chip specific common variables
41 int ccrev; /* chip common core rev */
42 uint32 cccaps; /* chip common capabilities */
43 uint32 cccaps_ext; /* chip common capabilities extension */
51 uint chip; /* chip number */ member in struct:si_pub
52 uint chiprev; /* chip revision */
53 uint chippkg; /* chip package option */
54 uint32 chipst; /* chip status */
55 bool issim; /* chip i
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/alpha/kernel/
H A Dirq.c51 if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
59 irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu));
95 seq_printf(p, " %14s", irq_desc[irq].chip->typename);
H A Dirq_alpha.c244 irq_desc[RTC_IRQ].chip = &rtc_irq_type;
H A Dirq_i8259.c111 irq_desc[i].chip = &i8259a_irq_type;
H A Dirq_pyxis.c123 irq_desc[i].chip = &pyxis_irq_type;
H A Dirq_srm.c70 irq_desc[i].chip = &srm_irq_type;
H A Dsys_alcor.c146 irq_desc[i].chip = &alcor_irq_type;
H A Dsys_cabriolet.c126 irq_desc[i].chip = &cabriolet_irq_type;
H A Dsys_dp264.c277 irq_desc[i].chip = ops;
H A Dsys_eb64p.c139 irq_desc[i].chip = &eb64p_irq_type;
179 * 8 Intel SIO PCI-ISA bridge chip
H A Dsys_eiger.c157 irq_desc[i].chip = &eiger_irq_type;
H A Dsys_jensen.c188 irq_desc[1].chip = &jensen_local_irq_type;
189 irq_desc[4].chip = &jensen_local_irq_type;
190 irq_desc[3].chip = &jensen_local_irq_type;
191 irq_desc[7].chip = &jensen_local_irq_type;
192 irq_desc[9].chip = &jensen_local_irq_type;
H A Dsys_marvel.c308 irq_desc[base + i].chip = lsi_ops;
322 irq_desc[base + i].chip = msi_ops;
340 irq_desc[i].chip = &marvel_legacy_irq_type;
H A Dsys_mikasa.c119 irq_desc[i].chip = &mikasa_irq_type;
153 * 7 Intel PCI-EISA bridge chip
H A Dsys_noritake.c148 irq_desc[i].chip = &noritake_irq_type;
200 * 7 Intel PCI-EISA bridge chip
201 * 8 DEC PCI-PCI bridge chip
H A Dsys_rawhide.c198 irq_desc[i].chip = &rawhide_irq_type;
H A Dsys_rx164.c120 irq_desc[i].chip = &rx164_irq_type;
H A Dsys_sable.c527 irq_desc[i].chip = &sable_lynx_irq_type;
H A Dsys_takara.c157 irq_desc[i].chip = &takara_irq_type;
H A Dsys_titan.c192 irq_desc[i].chip = ops;
H A Dsys_wildfire.c161 irq_desc[i+irq_bias].chip = &wildfire_irq_type;
165 irq_desc[36+irq_bias].chip = &wildfire_irq_type;
168 irq_desc[i+irq_bias].chip = &wildfire_irq_type;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/boot/compressed/
H A Dhead-sharpsl.S28 mov r1, #0x10000000 @ Base address of TC6393 chip
42 ldr r1, .W100ADDR @ Base address of w100 chip + regs offset
82 /* Check for a second SCOOP chip - if found we have Borzoi */
128 mov r1, #0x0c000000 @ Base address of NAND chip
144 tst r3, #32 @ Is chip ready?

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