/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | smu7_smumgr.c | 43 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, smc_addr); 108 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data); 144 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data); 181 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0); 182 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); 201 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); 285 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, value); 460 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, 0x20000); 464 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, *src++); 504 cgs_write_register(hwmg [all...] |
H A D | smu8_smumgr.c | 88 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter); 90 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_RESP_0, 0); 91 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_MSG_0, msg); 125 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX_0, 141 cgs_write_register(hwmgr->device, mmMP0PUB_IND_DATA_0, value); 157 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index); 195 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, tmp); 204 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_CNTL, tmp); 208 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data); 212 cgs_write_register(hwmg [all...] |
H A D | iceland_smumgr.c | 166 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); 171 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); 2617 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); 2618 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING)); 2619 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY)); 2620 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0)); 2621 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1)); 2622 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL)); 2623 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD)); 2624 cgs_write_register(hwmg [all...] |
H A D | ci_smumgr.c | 103 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, smc_addr); 134 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); 170 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); 213 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0); 214 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); 230 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); 2334 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); 2339 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); 2690 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); 2691 cgs_write_register(hwmg [all...] |
H A D | tonga_smumgr.c | 3081 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, 3083 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, 3085 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, 3087 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, 3089 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, 3091 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, 3093 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, 3095 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, 3097 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, 3099 cgs_write_register(hwmg [all...] |
H A D | fiji_smumgr.c | 213 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000); 215 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); 217 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); 2523 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, 2525 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, 2527 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, 2529 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, 2531 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, 2533 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, 2535 cgs_write_register(hwmg [all...] |
H A D | polaris10_smumgr.c | 111 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000); 113 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); 114 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0);
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/linux-master/drivers/gpu/drm/amd/include/ |
H A D | cgs_common.h | 93 * cgs_write_register() - Write an MMIO register 131 cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field)) 166 #define cgs_write_register(dev, offset, value) \ macro
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_acp.c | 456 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 474 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); 492 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 525 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 542 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val);
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | smu_helper.h | 163 cgs_write_register(device, mm##reg, PHM_SET_FIELD( \
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H A D | smu_helper.c | 151 cgs_write_register(hwmgr->device, indirect_port, index); 188 cgs_write_register(hwmgr->device, indirect_port, index);
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H A D | vega10_powertune.c | 793 cgs_write_register(hwmgr->device, config_regs->offset, data); 986 cgs_write_register(hwmgr->device, mmGC_DIDT_CTRL0, data); 1100 cgs_write_register(hwmgr->device, mmGC_EDC_CTRL, data);
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H A D | smu7_powertune.c | 946 cgs_write_register(hwmgr->device, config_regs->offset, data); 981 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value); 1010 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value2);
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H A D | smu7_hwmgr.c | 205 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F); 538 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING, mc_arb_dram_timing); 539 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2, mc_arb_dram_timing2); 543 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1, mc_arb_dram_timing); 544 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2); 553 cgs_write_register(hwmgr->device, mmMC_CG_CONFIG, mc_cg_config); 1285 cgs_write_register(hwmgr->device, 0x1488, 4764 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX,
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/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm.c | 11433 cgs_write_register(ctx->cgs_device, address, value);
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