Searched refs:cgs_read_register (Results 1 - 17 of 17) sorted by relevance
/linux-master/drivers/gpu/drm/amd/acp/ |
H A D | acp_hw.c | 43 acp_mode = cgs_read_register(cgs_device,
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_acp.c | 453 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 460 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 472 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); 479 val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); 490 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 522 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 529 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 540 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); 547 val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);
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/linux-master/drivers/gpu/drm/amd/include/ |
H A D | cgs_common.h | 84 * cgs_read_register() - Read an MMIO register 131 cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field)) 164 #define cgs_read_register(dev, offset) \ macro
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | iceland_smumgr.c | 1308 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) 1309 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; 1311 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; 1317 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; 1600 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); 1601 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); 2372 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); 2524 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS); 2536 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS); 2565 temp_reg = cgs_read_register(hwmg [all...] |
H A D | ci_smumgr.c | 151 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0); 204 *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0); 1262 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) 1263 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; 1265 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; 1271 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; 1639 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); 1640 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); 2445 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); 2597 temp_reg = cgs_read_register(hwmg [all...] |
H A D | tonga_smumgr.c | 1048 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) { 1049 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; 1051 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; 1060 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; 1475 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); 1476 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); 2401 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & 2834 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); 2988 temp_reg = cgs_read_register(hwmgr->device, 3001 temp_reg = cgs_read_register(hwmg [all...] |
H A D | smu8_smumgr.c | 61 return cgs_read_register(hwmgr->device, 80 uint32_t val = cgs_read_register(hwmgr->device, 161 (cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA) & firmware)) 191 tmp = cgs_read_register(hwmgr->device, 197 tmp = cgs_read_register(hwmgr->device, 746 hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);
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H A D | smu7_smumgr.c | 125 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11); 208 return cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); 271 *value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);
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H A D | fiji_smumgr.c | 1508 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); 1509 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); 1510 burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); 2072 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & 2524 cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); 2526 cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING)); 2528 cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2)); 2530 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); 2532 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0)); 2534 cgs_read_register(hwmg [all...] |
H A D | vegam_smumgr.c | 1262 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); 1263 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); 1264 burst_time = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); 1265 rfsh_rate = cgs_read_register(hwmgr->device, mmMC_ARB_RFSH_RATE); 1266 misc3 = cgs_read_register(hwmgr->device, mmMC_ARB_MISC3); 2086 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &
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H A D | polaris10_smumgr.c | 1478 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); 1479 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); 2078 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) 2565 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | smu_helper.h | 152 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field) 164 cgs_read_register(device, mm##reg), reg, field, fieldval))
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H A D | smu7_hwmgr.c | 207 hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA); 523 mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); 524 mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); 528 mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1); 529 mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1); 551 mc_cg_config = cgs_read_register(hwmgr->device, mmMC_CG_CONFIG); 1286 (cgs_read_register(hwmgr->device, 0x1488) & ~0x1)); 4766 tmp = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA); 4804 cgs_read_register(hwmgr->device, mmDLL_CNTL); 4806 cgs_read_register(hwmg [all...] |
H A D | smu_helper.c | 122 cur_value = cgs_read_register(hwmgr->device, index); 166 cur_value = cgs_read_register(hwmgr->device,
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H A D | smu7_powertune.c | 924 data = cgs_read_register(hwmgr->device, config_regs->offset); 976 value2 = cgs_read_register(hwmgr->device, mmGRBM_GFX_INDEX);
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H A D | vega10_powertune.c | 790 data = cgs_read_register(hwmgr->device, config_regs->offset);
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/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm.c | 11456 value = cgs_read_register(ctx->cgs_device, address);
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