Searched refs:cgs_read_ind_register (Results 1 - 14 of 14) sorted by relevance
/linux-master/drivers/gpu/drm/amd/include/ |
H A D | cgs_common.h | 102 * cgs_read_ind_register() - Read an indirect register 134 cgs_write_ind_register(device, space, ix##reg, (cgs_read_ind_register(device, space, ix##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field)) 168 #define cgs_read_ind_register(dev, space, index) \ macro
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | smu_helper.h | 155 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 159 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 168 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 173 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
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H A D | smu8_hwmgr.c | 1567 now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, 1579 now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, 1702 uint32_t val = cgs_read_ind_register(hwmgr->device, 1728 uint32_t sclk_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGET_AND_CURRENT_PROFILE_INDEX), 1730 uint32_t uvd_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGET_AND_CURRENT_PROFILE_INDEX_2), 1732 uint32_t vce_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGET_AND_CURRENT_PROFILE_INDEX_2), 1753 tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMUSVI_NB_CURRENTVID) & 1759 tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMUSVI_GFX_CURRENTVID) &
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H A D | vega10_powertune.c | 758 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset); 764 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset); 770 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_SE_CAC, config_regs->offset); 841 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_SQ_EDC_CTRL); 848 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DB_EDC_CTRL); 855 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TD_EDC_CTRL); 862 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TCP_EDC_CTRL); 869 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DBR_EDC_CTRL);
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H A D | smu7_hwmgr.c | 217 speedCntl = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__PCIE, 454 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 581 tmp = (cgs_read_ind_register(hwmgr->device, 1172 soft_register_value = cgs_read_ind_register(hwmgr->device, 1188 soft_register_value = cgs_read_ind_register(hwmgr->device, 2544 temp_reg = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCNB_PWRMGT_CNTL); 3985 tmp = cgs_read_ind_register(hwmgr->device, 4027 activity_percent = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset); 4576 uint32_t display_gap = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL); 4792 cgs_read_ind_register(hwmg [all...] |
H A D | smu7_powertune.c | 912 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, config_regs->offset); 916 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset); 920 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset);
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/linux-master/drivers/gpu/drm/amd/display/dc/ |
H A D | dm_services.h | 76 return cgs_read_ind_register(ctx->cgs_device, addr_space, index);
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 1678 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 1680 efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 1737 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 1810 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); 2380 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 2416 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 2583 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2597 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2618 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2632 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmg [all...] |
H A D | tonga_smumgr.c | 1597 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 1599 efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 1666 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 1737 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 2691 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 2726 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 3182 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 3196 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 3217 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 3231 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmg [all...] |
H A D | polaris10_smumgr.c | 327 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_EFUSE_0 + (49*4)); 1704 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); 2296 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 2332 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 2621 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2635 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2656 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2670 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));
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H A D | smu7_smumgr.c | 163 && (0x20100 <= cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMC_PC_C)));
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H A D | vegam_smumgr.c | 345 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 381 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, 1540 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); 1551 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,
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H A D | ci_smumgr.c | 190 && (0x20100 <= cgs_read_ind_register(hwmgr->device, 2795 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2809 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2830 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); 2844 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));
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H A D | iceland_smumgr.c | 211 val = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,
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