/linux-master/drivers/net/ethernet/altera/ |
H A D | altera_utils.c | 9 void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) argument 12 value |= bit_mask; 16 void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) argument 19 value &= ~bit_mask; 23 int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask) argument 26 return (value & bit_mask) ? 1 : 0; 29 int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask) argument 32 return (value & bit_mask) ? 0 : 1;
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H A D | altera_utils.h | 12 void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); 13 void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); 14 int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask); 15 int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask);
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/linux-master/drivers/thermal/intel/ |
H A D | thermal_interrupt.h | 22 extern void thermal_clear_package_intr_status(int level, u64 bit_mask);
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/linux-master/arch/arm/mach-socfpga/ |
H A D | ocram.c | 65 static inline void ecc_set_bits(u32 bit_mask, void __iomem *ioaddr) argument 69 value |= bit_mask; 73 static inline void ecc_clear_bits(u32 bit_mask, void __iomem *ioaddr) argument 77 value &= ~bit_mask; 81 static inline int ecc_test_bits(u32 bit_mask, void __iomem *ioaddr) argument 85 return (value & bit_mask) ? 1 : 0;
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/linux-master/drivers/video/fbdev/core/ |
H A D | sysimgblt.c | 191 u32 bit_mask, eorx, shift; local 223 bit_mask = (1 << ppw) - 1; 243 *dst++ = colortab[(*src >> 4) & bit_mask]; 244 *dst++ = colortab[(*src >> 0) & bit_mask]; 249 *dst++ = colortab[(*src >> 6) & bit_mask]; 250 *dst++ = colortab[(*src >> 4) & bit_mask]; 251 *dst++ = colortab[(*src >> 2) & bit_mask]; 252 *dst++ = colortab[(*src >> 0) & bit_mask]; 257 *dst++ = colortab[(*src >> 7) & bit_mask]; 258 *dst++ = colortab[(*src >> 6) & bit_mask]; [all...] |
H A D | cfbimgblt.c | 221 u32 bit_mask, eorx, shift; local 253 bit_mask = (1 << ppw) - 1; 273 FB_WRITEL(colortab[(*src >> 4) & bit_mask], dst++); 274 FB_WRITEL(colortab[(*src >> 0) & bit_mask], dst++); 279 FB_WRITEL(colortab[(*src >> 6) & bit_mask], dst++); 280 FB_WRITEL(colortab[(*src >> 4) & bit_mask], dst++); 281 FB_WRITEL(colortab[(*src >> 2) & bit_mask], dst++); 282 FB_WRITEL(colortab[(*src >> 0) & bit_mask], dst++); 287 FB_WRITEL(colortab[(*src >> 7) & bit_mask], dst++); 288 FB_WRITEL(colortab[(*src >> 6) & bit_mask], ds [all...] |
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
H A D | dr_ste_v1.c | 1102 bool inner, u8 *bit_mask) 1106 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, dmac_47_16, mask, dmac_47_16); 1107 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, dmac_15_0, mask, dmac_15_0); 1109 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, smac_47_16, mask, smac_47_16); 1110 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, smac_15_0, mask, smac_15_0); 1112 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, first_vlan_id, mask, first_vid); 1113 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, first_cfi, mask, first_cfi); 1114 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, first_priority, mask, first_prio); 1115 DR_STE_SET_ONES(eth_l2_src_dst_v1, bit_mask, l3_type, mask, ip_version); 1118 MLX5_SET(ste_eth_l2_src_dst_v1, bit_mask, first_vlan_qualifie 1101 dr_ste_v1_build_eth_l2_src_dst_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 1255 dr_ste_v1_build_eth_l2_src_or_dst_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 1363 dr_ste_v1_build_eth_l2_src_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 1396 dr_ste_v1_build_eth_l2_dst_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 1429 dr_ste_v1_build_eth_l2_tnl_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 1967 dr_ste_v1_build_src_gvmi_qpn_bit_mask(struct mlx5dr_match_param *value, u8 *bit_mask) argument 1986 u8 *bit_mask = sb->bit_mask; local [all...] |
H A D | dr_ste_v0.c | 705 bool inner, u8 *bit_mask) 709 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, dmac_47_16, mask, dmac_47_16); 710 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, dmac_15_0, mask, dmac_15_0); 713 MLX5_SET(ste_eth_l2_src_dst, bit_mask, smac_47_32, 715 MLX5_SET(ste_eth_l2_src_dst, bit_mask, smac_31_0, 721 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, first_vlan_id, mask, first_vid); 722 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, first_cfi, mask, first_cfi); 723 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, first_priority, mask, first_prio); 724 DR_STE_SET_ONES(eth_l2_src_dst, bit_mask, l3_type, mask, ip_version); 727 MLX5_SET(ste_eth_l2_src_dst, bit_mask, first_vlan_qualifie 704 dr_ste_v0_build_eth_l2_src_dst_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 881 dr_ste_v0_build_eth_l2_src_or_dst_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 993 dr_ste_v0_build_eth_l2_src_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 1028 dr_ste_v0_build_eth_l2_dst_bit_mask(struct mlx5dr_match_param *value, struct mlx5dr_ste_build *sb, u8 *bit_mask) argument 1065 dr_ste_v0_build_eth_l2_tnl_bit_mask(struct mlx5dr_match_param *value, bool inner, u8 *bit_mask) argument 1634 dr_ste_v0_build_src_gvmi_qpn_bit_mask(struct mlx5dr_match_param *value, u8 *bit_mask) argument 1654 u8 *bit_mask = sb->bit_mask; local [all...] |
/linux-master/drivers/net/wireless/ralink/rt2x00/ |
H A D | rt2x00reg.h | 149 u8 bit_mask; member in struct:rt2x00_field8 154 u16 bit_mask; member in struct:rt2x00_field16 159 u32 bit_mask; member in struct:rt2x00_field32 238 *(__reg) &= ~((__field).bit_mask); \ 241 ((__field).bit_mask); \ 247 ((__reg) & ((__field).bit_mask)) >> \
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/linux-master/drivers/staging/media/starfive/camss/ |
H A D | stf-camss.h | 118 u32 reg, u32 bit_mask) 123 iowrite32(value | bit_mask, stfcamss->syscon_base + reg); 127 u32 reg, u32 bit_mask) 132 iowrite32(value & ~bit_mask, stfcamss->syscon_base + reg); 117 stf_syscon_reg_set_bit(struct stfcamss *stfcamss, u32 reg, u32 bit_mask) argument 126 stf_syscon_reg_clear_bit(struct stfcamss *stfcamss, u32 reg, u32 bit_mask) argument
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/linux-master/include/linux/mfd/da9055/ |
H A D | core.h | 68 unsigned char bit_mask, 71 return regmap_update_bits(da9055->regmap, reg, bit_mask, reg_val); 67 da9055_reg_update(struct da9055 *da9055, unsigned char reg, unsigned char bit_mask, unsigned char reg_val) argument
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/linux-master/drivers/mfd/ |
H A D | adp5520.c | 72 uint8_t bit_mask) 83 reg_val |= bit_mask; 103 int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask) argument 113 if (!ret && ((reg_val & bit_mask) != bit_mask)) { 114 reg_val |= bit_mask; 123 int adp5520_clr_bits(struct device *dev, int reg, uint8_t bit_mask) argument 133 if (!ret && (reg_val & bit_mask)) { 134 reg_val &= ~bit_mask; 71 __adp5520_ack_bits(struct i2c_client *client, int reg, uint8_t bit_mask) argument
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/linux-master/drivers/net/ethernet/freescale/fman/ |
H A D | fman_tgec.c | 261 u32 bit_mask; local 265 bit_mask = TGEC_IMASK_MDIO_SCAN_EVENT; 268 bit_mask = TGEC_IMASK_MDIO_CMD_CMPL; 271 bit_mask = TGEC_IMASK_REM_FAULT; 274 bit_mask = TGEC_IMASK_LOC_FAULT; 277 bit_mask = TGEC_IMASK_TX_ECC_ER; 280 bit_mask = TGEC_IMASK_TX_FIFO_UNFL; 283 bit_mask = TGEC_IMASK_TX_FIFO_OVFL; 286 bit_mask = TGEC_IMASK_TX_ER; 289 bit_mask 597 u32 bit_mask = 0; local [all...] |
H A D | fman_dtsec.c | 463 u32 bit_mask = 0x80000000 >> bit_idx; local 472 iowrite32be(ioread32be(reg) | bit_mask, reg); 474 iowrite32be(ioread32be(reg) & (~bit_mask), reg); 524 u32 bit_mask; local 528 bit_mask = DTSEC_IMASK_BREN; 531 bit_mask = DTSEC_IMASK_RXCEN; 534 bit_mask = DTSEC_IMASK_GTSCEN; 537 bit_mask = DTSEC_IMASK_BTEN; 540 bit_mask = DTSEC_IMASK_TXCEN; 543 bit_mask 1212 u32 bit_mask = 0; local [all...] |
/linux-master/drivers/hid/ |
H A D | hid-prodikeys.c | 298 u32 bit_mask; local 300 bit_mask = data[1]; 301 bit_mask = (bit_mask << 8) | data[2]; 302 bit_mask = (bit_mask << 8) | data[3]; 307 if (pm->midi_mode && bit_mask == 0x004000) { 317 else if (pm->midi_mode && bit_mask == 0x000004) { 374 u32 bit_mask; local 377 bit_mask [all...] |
/linux-master/include/linux/mfd/ |
H A D | tps6586x.h | 105 extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask); 106 extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
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H A D | rc5t583.h | 344 unsigned int bit_mask) 347 return regmap_update_bits(rc5t583->regmap, reg, bit_mask, bit_mask); 351 unsigned int bit_mask) 354 return regmap_update_bits(rc5t583->regmap, reg, bit_mask, 0); 343 rc5t583_set_bits(struct device *dev, unsigned int reg, unsigned int bit_mask) argument 350 rc5t583_clear_bits(struct device *dev, unsigned int reg, unsigned int bit_mask) argument
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/linux-master/arch/x86/include/asm/ |
H A D | hpet.h | 82 extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask); 83 extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
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/linux-master/drivers/clk/bcm/ |
H A D | clk-iproc-asiu.c | 89 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); 91 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); 149 val &= ~(bit_mask(clk->div.high_width) 153 val &= ~(bit_mask(clk->div.high_width) 157 val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); 160 val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift);
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H A D | clk-iproc-pll.c | 188 val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; 199 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); 211 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); 218 val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; 256 val &= ~(bit_mask(dig_filter->ki_width) << dig_filter->ki_shift | 257 bit_mask(dig_filter->kp_width) << dig_filter->kp_shift | 258 bit_mask(dig_filter->ka_width) << dig_filter->ka_shift); 291 bit_mask(ctrl->ndiv_int.width); 297 pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); 358 val &= ~(bit_mask(ctr [all...] |
/linux-master/drivers/staging/most/dim2/ |
H A D | hal.c | 53 static inline u32 bit_mask(u8 position) function 161 u32 const cmd = bit_mask(MADR_WNR_BIT) | bit_mask(MADR_TB_BIT); 197 dim2_transfer_madr(bit_mask(MADR_WNR_BIT) | ctr_addr); 306 bit_mask(ADT1_PS_BIT + shift) | 307 bit_mask(ADT1_RDY_BIT + shift) | 329 bit_mask(ADT1_RDY_BIT + shift) | 359 writel(readl(&g.dim2->ACMR0) | bit_mask(ch_addr), &g.dim2->ACMR0); 365 writel(readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr), &g.dim2->ACMR0); 374 writel(bit_mask(ch_add [all...] |
/linux-master/drivers/staging/vt6655/ |
H A D | mac.c | 40 void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) argument 45 iowrite8(reg_value | bit_mask, iobase + reg_offset); 48 void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask) argument 53 iowrite16(reg_value | (bit_mask), iobase + reg_offset); 56 void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) argument 61 iowrite8(reg_value & ~(bit_mask), iobase + reg_offset); 64 void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask) argument 69 iowrite16(reg_value & ~(bit_mask), iobase + reg_offset);
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/linux-master/drivers/platform/x86/intel/pmc/ |
H A D | core.c | 249 data & map->bit_mask ? "Yes" : "No"); 253 data & map->bit_mask ? "Yes" : "No"); 275 int index, idx, len = 32, bit_mask, arr_size; local 296 bit_mask = maps[idx][index].bit_mask; 300 lpm_regs[idx] & bit_mask ? 1 : 0); 304 lpm_regs[idx] & bit_mask ? 1 : 0); 323 pf_map[idx][index].bit_mask & pf_reg ? "Off" : "On"); 425 map[index].bit_mask & val_low ? "Not power gated" : 432 map[index].bit_mask 813 u32 bit_mask = map[i].bit_mask; local [all...] |
/linux-master/drivers/irqchip/ |
H A D | irq-starfive-jh8100-intc.c | 36 u32 reg, u32 bit_mask) 41 value |= bit_mask; 46 u32 reg, u32 bit_mask) 51 value &= ~bit_mask; 35 starfive_intc_bit_set(struct starfive_irq_chip *irqc, u32 reg, u32 bit_mask) argument 45 starfive_intc_bit_clear(struct starfive_irq_chip *irqc, u32 reg, u32 bit_mask) argument
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/linux-master/drivers/platform/x86/ |
H A D | pmc_atom.c | 25 u32 bit_mask; member in struct:pmc_bit_map 268 fd_map[index].bit_mask & fd ? "Disabled" : "Enabled ", 269 sts_map[index].bit_mask & sts ? "D3" : "D0"); 306 map[index].bit_mask & pss ? "Off" : "On"); 461 if (!(fd_map[index].bit_mask & fd) && 462 !(sts_map[index].bit_mask & sts)) { 463 if (sts_map[index].bit_mask & sts_possible_false_pos)
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