/linux-master/drivers/char/ipmi/ |
H A D | ipmi_dmi.h | 9 unsigned long base_addr);
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H A D | ipmi_dmi.c | 35 static void __init dmi_add_platform_ipmi(unsigned long base_addr, argument 70 p.addr = base_addr; 83 info->addr = base_addr; 101 unsigned long base_addr) 108 info->addr == base_addr) 130 unsigned long base_addr; local 142 memcpy(&base_addr, data + DMI_IPMI_ADDR, sizeof(unsigned long)); 143 if (!base_addr) { 150 base_addr = data[DMI_IPMI_ADDR] >> 1; 151 if (base_addr 100 ipmi_dmi_get_slave_addr(enum si_type si_type, unsigned int space, unsigned long base_addr) argument [all...] |
/linux-master/sound/soc/amd/rpl/ |
H A D | rpl_acp6x.h | 28 static inline u32 rpl_acp_readl(void __iomem *base_addr) argument 30 return readl(base_addr - ACP6x_PHY_BASE_ADDRESS); 33 static inline void rpl_acp_writel(u32 val, void __iomem *base_addr) argument 35 writel(val, base_addr - ACP6x_PHY_BASE_ADDRESS);
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/linux-master/include/trace/events/ |
H A D | percpu.h | 15 size_t align, void *base_addr, int off, 18 TP_ARGS(call_site, reserved, is_atomic, size, align, base_addr, off, 27 __field( void *, base_addr ) 39 __entry->base_addr = base_addr; 46 TP_printk("call_site=%pS reserved=%d is_atomic=%d size=%zu align=%zu base_addr=%p off=%d ptr=%p bytes_alloc=%zu gfp_flags=%s", 50 __entry->base_addr, __entry->off, __entry->ptr, 56 TP_PROTO(void *base_addr, int off, void __percpu *ptr), 58 TP_ARGS(base_addr, off, ptr), 61 __field( void *, base_addr ) [all...] |
/linux-master/drivers/w1/masters/ |
H A D | amd_axi_w1.c | 60 void __iomem *base_addr; member in struct:amd_axi_w1_local 81 iowrite32(IRQ, amd_axi_w1_local->base_addr + AXIW1_IRQE_REG); 114 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_READY) == 0) { 123 iowrite32(AXIW1_READBIT, amd_axi_w1_local->base_addr + AXIW1_INST_REG); 127 amd_axi_w1_local->base_addr + AXIW1_INST_REG); 130 iowrite32(AXIW1_GO, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG); 133 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_DONE) != 1) { 141 val = (u8)(ioread32(amd_axi_w1_local->base_addr + AXIW1_DATA_REG) & AXIW1_READDATA); 144 iowrite32(AXI_CLEAR, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG); 162 while ((ioread32(amd_axi_w1_local->base_addr [all...] |
/linux-master/arch/sparc/prom/ |
H A D | memory.c | 24 sp_banks[index].base_addr = (unsigned long) p->start_adr; 43 sp_banks[i].base_addr = reg[i].phys_addr; 54 if (x->base_addr > y->base_addr) 56 if (x->base_addr < y->base_addr) 83 sp_banks[num_ents].base_addr = 0xdeadbeef;
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/linux-master/drivers/gpio/ |
H A D | gpio-ts4800.c | 22 void __iomem *base_addr; local 30 base_addr = devm_platform_ioremap_resource(pdev, 0); 31 if (IS_ERR(base_addr)) 32 return PTR_ERR(base_addr); 44 retval = bgpio_init(chip, &pdev->dev, 2, base_addr + INPUT_REG_OFFSET, 45 base_addr + OUTPUT_REG_OFFSET, NULL, 46 base_addr + DIRECTION_REG_OFFSET, NULL, 0);
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/linux-master/arch/x86/um/asm/ |
H A D | desc.h | 8 (info)->base_addr == 0 && \
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H A D | mm_context.h | 36 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) 39 (((info)->base_addr & 0xff000000) | \ 40 (((info)->base_addr & 0x00ff0000) >> 16) | \ 51 (info)->base_addr == 0 && \
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/linux-master/arch/x86/include/uapi/asm/ |
H A D | ldt.h | 23 unsigned int base_addr; member in struct:user_desc
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/linux-master/drivers/irqchip/ |
H A D | irq-ftintc010.c | 26 #define FT010_IRQ_SOURCE(base_addr) (base_addr + 0x00) 27 #define FT010_IRQ_MASK(base_addr) (base_addr + 0x04) 28 #define FT010_IRQ_CLEAR(base_addr) (base_addr + 0x08) 30 #define FT010_IRQ_MODE(base_addr) (base_addr + 0x0C) 32 #define FT010_IRQ_POLARITY(base_addr) (base_addr [all...] |
/linux-master/drivers/net/wwan/t7xx/ |
H A D | t7xx_mhccif.c | 34 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; 82 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_STS); 87 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_SET); 92 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_CLR); 97 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK); 107 t7xx_dev->base_addr.mhccif_rc_base = t7xx_dev->base_addr.pcie_ext_reg_base + 109 t7xx_dev->base_addr.pcie_dev_reg_trsl_addr; 118 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base;
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/linux-master/drivers/clk/mediatek/ |
H A D | clk-apmixed.c | 22 void __iomem *base_addr; member in struct:mtk_ref2usb_tx 34 return (readl(tx->base_addr) & REF2USB_EN_MASK) == REF2USB_EN_MASK; 42 val = readl(tx->base_addr); 45 writel(val, tx->base_addr); 49 writel(val, tx->base_addr); 52 writel(val, tx->base_addr); 62 val = readl(tx->base_addr); 64 writel(val, tx->base_addr); 84 tx->base_addr = reg;
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/linux-master/tools/testing/selftests/mm/ |
H A D | map_fixed_noreplace.c | 43 unsigned long base_addr; local 54 base_addr = find_base_addr(size); 59 addr = base_addr; 72 addr = base_addr + page_size; 89 addr = base_addr; 107 addr = base_addr + (2 * page_size); 124 addr = base_addr + (3 * page_size); 141 addr = base_addr; 158 addr = base_addr; 175 addr = base_addr [all...] |
/linux-master/drivers/fpga/ |
H A D | altera-freeze-bridge.c | 34 void __iomem *base_addr; member in struct:altera_freeze_br_data 45 void __iomem *csr_illegal_req_addr = priv->base_addr + 66 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); 70 ctrl = readl(priv->base_addr + FREEZE_CSR_CTRL_OFFSET); 91 void __iomem *csr_ctrl_addr = priv->base_addr + 96 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); 126 void __iomem *csr_ctrl_addr = priv->base_addr + 133 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); 151 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); 212 void __iomem *base_addr; local [all...] |
/linux-master/arch/x86/um/shared/sysdep/ |
H A D | tls.h | 13 unsigned int base_addr; member in struct:um_dup_user_desc
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/linux-master/sound/soc/amd/renoir/ |
H A D | rn_acp3x.h | 82 static inline u32 rn_readl(void __iomem *base_addr) argument 84 return readl(base_addr - ACP_PHY_BASE_ADDRESS); 87 static inline void rn_writel(u32 val, void __iomem *base_addr) argument 89 writel(val, base_addr - ACP_PHY_BASE_ADDRESS);
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/linux-master/sound/soc/amd/yc/ |
H A D | acp6x.h | 99 static inline u32 acp6x_readl(void __iomem *base_addr) argument 101 return readl(base_addr - ACP6x_PHY_BASE_ADDRESS); 104 static inline void acp6x_writel(u32 val, void __iomem *base_addr) argument 106 writel(val, base_addr - ACP6x_PHY_BASE_ADDRESS);
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/linux-master/arch/mips/rb532/ |
H A D | irq.c | 50 volatile u32 *base_addr; member in struct:intr_group 62 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)}, 65 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET)}, 68 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET)}, 71 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET)}, 74 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET)} 128 addr = intr_group[group].base_addr; 146 addr = intr_group[group].base_addr; 226 addr = intr_group[group].base_addr;
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/linux-master/arch/powerpc/include/asm/ |
H A D | dcr-native.h | 78 static inline unsigned __mfdcri(int base_addr, int base_data, int reg) argument 85 mtdcrx(base_addr, reg); 88 __mtdcr(base_addr, reg); 95 static inline void __mtdcri(int base_addr, int base_data, int reg, argument 102 mtdcrx(base_addr, reg); 105 __mtdcr(base_addr, reg); 111 static inline void __dcri_clrset(int base_addr, int base_data, int reg, argument 119 mtdcrx(base_addr, reg); 123 __mtdcr(base_addr, reg);
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/linux-master/drivers/staging/axis-fifo/ |
H A D | axis-fifo.c | 124 void __iomem *base_addr; /* kernel space memory */ member in struct:axis_fifo 158 iowrite32(tmp, fifo->base_addr + addr_offset); 169 read_val = ioread32(fifo->base_addr + addr_offset); 323 iowrite32(XLLF_SRR_RESET_MASK, fifo->base_addr + XLLF_SRR_OFFSET); 324 iowrite32(XLLF_TDFR_RESET_MASK, fifo->base_addr + XLLF_TDFR_OFFSET); 325 iowrite32(XLLF_RDFR_RESET_MASK, fifo->base_addr + XLLF_RDFR_OFFSET); 329 fifo->base_addr + XLLF_IER_OFFSET); 330 iowrite32(XLLF_INT_ALL_MASK, fifo->base_addr + XLLF_ISR_OFFSET); 368 if (!ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)) { 379 ioread32(fifo->base_addr [all...] |
/linux-master/drivers/accel/habanalabs/common/ |
H A D | decoder.c | 53 irq_status = RREG32(dec->base_addr + VCMD_IRQ_STATUS_OFFSET); 60 WREG32(dec->base_addr + VCMD_IRQ_STATUS_OFFSET, irq_status); 63 RREG32(dec->base_addr + VCMD_IRQ_STATUS_OFFSET); 111 dec->base_addr = hdev->asic_funcs->get_dec_base_addr(hdev, j); 112 if (!dec->base_addr) { 138 WREG32(dec->base_addr + VCMD_CONTROL_OFFSET, 0);
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/linux-master/drivers/misc/ |
H A D | qcom-coincell.c | 16 u32 base_addr; member in struct:qcom_coincell 38 chgr->base_addr + QCOM_COINCELL_REG_ENABLE, 0); 61 chgr->base_addr + QCOM_COINCELL_REG_RSET, i); 64 * This is mainly to flag a bad base_addr (reg) from dts. 74 chgr->base_addr + QCOM_COINCELL_REG_VSET, j); 80 chgr->base_addr + QCOM_COINCELL_REG_ENABLE, 101 rc = of_property_read_u32(node, "reg", &chgr.base_addr);
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/linux-master/drivers/parisc/ |
H A D | dino.c | 177 void __iomem *base_addr = d->hba.base_addr; local 180 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, 185 __raw_writel(v, base_addr + DINO_PCI_ADDR); 189 *val = readb(base_addr + DINO_CONFIG_DATA + (where & 3)); 191 *val = readw(base_addr + DINO_CONFIG_DATA + (where & 2)); 193 *val = readl(base_addr + DINO_CONFIG_DATA); 212 void __iomem *base_addr = d->hba.base_addr; local 215 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devf 508 dino_card_setup(struct pci_bus *bus, void __iomem *base_addr) argument [all...] |
/linux-master/drivers/clocksource/ |
H A D | timer-cadence-ttc.c | 69 * @base_addr: Base address of timer 75 void __iomem *base_addr; member in struct:ttc_timer 116 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); 118 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); 120 writel_relaxed(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET); 128 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); 145 readl_relaxed(timer->base_addr + TTC_ISR_OFFSET); 162 return (u64)readl_relaxed(timer->base_addr + 203 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); 205 writel_relaxed(ctrl_reg, timer->base_addr [all...] |