Searched refs:banks (Results 1 - 25 of 53) sorted by relevance

123

/u-boot/arch/arm/mach-octeontx/
H A Dcpu.c47 int banks = OTX_MEM_MAP_USED; local
51 otx_mem_map[banks].virt = 0x8c0000000000UL;
52 otx_mem_map[banks].phys = 0x8c0000000000UL;
53 otx_mem_map[banks].size = 0x40000000000UL;
54 otx_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
56 banks = banks + 1;
60 otx_mem_map[banks].virt = dram_start;
61 otx_mem_map[banks].phys = dram_start;
62 otx_mem_map[banks]
[all...]
/u-boot/arch/arm/mach-versal/
H A Dcpu.c72 int banks = VERSAL_MEM_MAP_USED; local
75 versal_mem_map[banks].virt = 0xffe00000UL;
76 versal_mem_map[banks].phys = 0xffe00000UL;
77 versal_mem_map[banks].size = 0x00200000UL;
78 versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
80 banks = banks + 1;
97 versal_mem_map[banks].virt = gd->bd->bi_dram[i].start;
98 versal_mem_map[banks].phys = gd->bd->bi_dram[i].start;
99 versal_mem_map[banks]
[all...]
/u-boot/arch/arm/mach-octeontx2/
H A Dcpu.c52 int banks = OTX2_MEM_MAP_USED; local
56 otx2_mem_map[banks].virt = dram_start;
57 otx2_mem_map[banks].phys = dram_start;
58 otx2_mem_map[banks].size = gd->ram_size;
59 otx2_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
61 banks = banks + 1;
/u-boot/board/sipeed/maix/
H A Dmaix.c20 const char * const banks[] = { "sram0", "sram1", "aisram" }; local
29 for (i = 0; i < ARRAY_SIZE(banks); i++) {
30 ret = clk_get_by_name_nodev(memory, banks[i], &clk);
/u-boot/arch/arm/mach-versal-net/
H A Dcpu.c68 int banks = VERSAL_NET_MEM_MAP_USED; local
75 versal_mem_map[banks].virt = gd->bd->bi_dram[i].start;
76 versal_mem_map[banks].phys = gd->bd->bi_dram[i].start;
77 versal_mem_map[banks].size = gd->bd->bi_dram[i].size;
78 versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
80 banks = banks + 1;
/u-boot/arch/arm/mach-zynqmp/
H A Dcpu.c81 int banks = ZYNQMP_MEM_MAP_USED; local
84 zynqmp_mem_map[banks].virt = 0xffe00000UL;
85 zynqmp_mem_map[banks].phys = 0xffe00000UL;
86 zynqmp_mem_map[banks].size = 0x00200000UL;
87 zynqmp_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
89 banks = banks + 1;
98 zynqmp_mem_map[banks].virt = gd->bd->bi_dram[i].start;
99 zynqmp_mem_map[banks].phys = gd->bd->bi_dram[i].start;
100 zynqmp_mem_map[banks]
[all...]
/u-boot/tools/
H A Dmkfwumdata.c37 {"banks", required_argument, NULL, 'b'},
51 "\t-b, --banks <num> Number of banks (mandatory)\n"
64 "\t where 'b' and 'i' are number of banks and number\n"
71 size_t banks; member in struct:fwu_mdata_object
79 static struct fwu_mdata_object *fwu_alloc_mdata(size_t images, size_t banks) argument
89 sizeof(struct fwu_image_bank_info) * banks) * images;
91 mobj->banks = banks;
109 sizeof(struct fwu_image_bank_info) * mobj->banks) * id
242 fwu_make_mdata(size_t images, size_t banks, char *uuids[], char *output) argument
279 unsigned long banks = 0, images = 0; local
[all...]
/u-boot/drivers/ram/
H A Dbmips_ram.c66 unsigned int is_32b, unsigned int banks)
72 return 1 << (cols + rows + is_32b + banks);
77 unsigned int cols = 0, rows = 0, is_32b = 0, banks = 0; local
84 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1;
86 return bmips_dram_size(cols, rows, is_32b, banks);
65 bmips_dram_size(unsigned int cols, unsigned int rows, unsigned int is_32b, unsigned int banks) argument
/u-boot/board/freescale/mx6memcal/
H A Dspl.c251 .banks = 8,
265 .banks = 8,
279 .banks = 8,
293 .banks = 8,
307 .banks = 8,
321 .banks = 8,
/u-boot/drivers/net/octeontx2/
H A Dnpc.h62 u8 banks; /* Number of MCAM banks */ member in struct:npc_mcam
/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dsdram.c30 u32 banks = DDR_BANK8 ? 8 : 4; local
34 size = (1 << (DDR_ROW + DDR_COL)) * dw * banks;
38 size = (1 << (DDR_ROW + DDR_COL)) * dw * banks;
/u-boot/include/
H A Dfdt_support.h108 * Fill the DT memory node with multiple memory banks.
110 * If banks is 0, it will not touch the existing reg property. This allows
115 * @param start Array of size <banks> to hold the start addresses.
116 * @param size Array of size <banks> to hold the size of each region.
117 * @param banks Number of memory banks to create. If 0, the reg
122 int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks);
123 int fdt_set_usable_memory(void *blob, u64 start[], u64 size[], int banks);
126 int banks)
125 fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) argument
/u-boot/drivers/pinctrl/meson/
H A Dpinctrl-meson.h28 struct meson_bank *banks; member in struct:meson_pinctrl_data
H A Dpinctrl-meson.c98 if (pin >= priv->data->banks[i].first &&
99 pin <= priv->data->banks[i].last) {
100 bank = &priv->data->banks[i];
/u-boot/board/bsh/imx6ulz_smm_m2/
H A Dspl.c89 .banks = 8,
/u-boot/board/kontron/sl-mx6ul/
H A Dspl.c175 .banks = 8,
196 .banks = 8,
/u-boot/board/technexion/pico-imx6/
H A Dspl.c145 .banks = 8,
159 .banks = 8,
/u-boot/board/ge/b1x5v2/
H A Dspl.c259 .banks = 8,
272 .banks = 8,
285 .banks = 8,
/u-boot/arch/arm/mach-imx/mx6/
H A Dopos6ul.c141 .banks = 8,
H A Dlitesom.c141 .banks = 8,
/u-boot/board/technexion/pico-imx6ul/
H A Dspl.c89 .banks = 8,
/u-boot/board/myir/mys_6ulx/
H A Dspl.c76 .banks = 8,
/u-boot/board/seeed/npi_imx6ull/
H A Dspl.c75 .banks = 8,
/u-boot/board/variscite/dart_6ul/
H A Dspl.c83 .banks = 8,
/u-boot/board/phytec/pcm058/
H A Dpcm058.c180 .banks = 8,

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