/linux-master/arch/arm/kernel/ |
H A D | fiqasm.S | 29 mov r0, r0 @ avoid hazard prior to ARMv4 34 mov r0, r0 @ avoid hazard prior to ARMv4 42 mov r0, r0 @ avoid hazard prior to ARMv4 47 mov r0, r0 @ avoid hazard prior to ARMv4
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H A D | entry-header.S | 226 @ We must avoid clrex due to Cortex-A15 erratum #830321 236 @ We must avoid clrex due to Cortex-A15 erratum #830321 318 @ We must avoid clrex due to Cortex-A15 erratum #830321 350 @ We must avoid clrex due to Cortex-A15 erratum #830321
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/linux-master/arch/arm/boot/compressed/ |
H A D | ll_char_wr.S | 67 sub r1, r1, #1 @ avoid using r7 directly after 72 tst r1, #7 @ avoid using r7 directly after 86 and ip, r7, #15 @ avoid r4 87 ldr ip, [lr, ip, lsl #2] @ avoid r4 88 mul ip, r2, ip @ avoid r4 89 sub r1, r1, #1 @ avoid ip 90 sub r0, r0, r5 @ avoid ip 96 and ip, r7, #15 @ avoid r4 97 ldr ip, [lr, ip, lsl #2] @ avoid r4 98 mul ip, r2, ip @ avoid r [all...] |
/linux-master/arch/x86/boot/compressed/ |
H A D | kaslr.c | 9 * to avoid) in order to select a physical memory location that can 312 * when KASLR searches for an appropriate random address. We must avoid any 322 * What is not obvious how to avoid is the range of memory that is used 421 /* Mark the memmap regions we need to avoid */ 452 struct mem_vector avoid; local 454 avoid.start = (unsigned long)ptr; 455 avoid.size = sizeof(*ptr) + ptr->len; 457 if (mem_overlaps(img, &avoid) && (avoid.start < earliest)) { 458 *overlap = avoid; [all...] |
/linux-master/arch/arc/mm/ |
H A D | tlbex.S | 10 * helps avoid a shift when preparing PD0 from PTE 54 ; [All of this dance is to avoid stack switching for each TLB Miss, since we 62 ; To avoid cache line bouncing the per-cpu global is aligned/sized per
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/linux-master/arch/arm/mach-sa1100/ |
H A D | sleep.S | 47 @ avoid accessing memory until this sequence is complete,
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/linux-master/scripts/atomic/ |
H A D | gen-atomic-instrumented.sh | 139 * KASAN, KCSAN), which should be used unless it is necessary to avoid
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/linux-master/arch/alpha/lib/ |
H A D | ev6-stxncpy.S | 170 beq t0, stxncpy_aligned # U : avoid loading dest word if not needed 234 /* Unaligned copy main loop. In order to avoid reading too much, 298 and t12, 0x80, t6 # E : avoid dest word load if we can (stall) 318 and a1, 7, t6 # E : avoid final load if possible 357 extra startup checks to avoid SEGV. */
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H A D | memchr.S | 48 # the length is the easiest way to avoid trouble.
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H A D | ev6-memchr.S | 46 # the length is the easiest way to avoid trouble.
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H A D | stxncpy.S | 138 beq t0, stxncpy_aligned # avoid loading dest word if not needed 192 /* Unaligned copy main loop. In order to avoid reading too much, 255 and t12, 0x80, t6 # e0 : avoid dest word load if we can 310 extra startup checks to avoid SEGV. */
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H A D | stxcpy.S | 164 /* Unaligned copy main loop. In order to avoid reading too much, 219 and t12, 0x80, t6 # e0 : avoid dest word load if we can 254 extra startup checks to avoid SEGV. */
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H A D | ev6-stxcpy.S | 188 /* Unaligned copy main loop. In order to avoid reading too much, 245 and t12, 0x80, t6 # E : avoid dest word load if we can (stall) 286 extra startup checks to avoid SEGV. */
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/linux-master/arch/x86/boot/ |
H A D | header.S | 14 * addresses. To avoid confusion, linear addresses are written using leading 316 # but leave it at 2 GB to avoid 453 # to be safe. To avoid problems at the block level allocating 5 extra bytes 454 # per 32767 bytes of data is sufficient. To avoid problems internal to a 458 # To avoid problems with the compressed data's meta information an extra 18
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/linux-master/arch/powerpc/platforms/cell/ |
H A D | spu_manage.c | 425 neighbour_spu(int cbe, struct device_node *target, struct device_node *avoid) argument 434 if (spu_dn == avoid)
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/linux-master/arch/xtensa/lib/ |
H A D | memcopy.S | 194 _beqz a4, .Ldone # avoid loading anything for zero-length copies 457 _beqz a4, .Lbackdone # avoid loading anything for zero-length copies
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H A D | usercopy.S | 207 sub a3, a3, a10 # align a3 (to avoid sim warnings only; not needed for hardware)
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/linux-master/arch/arc/kernel/ |
H A D | entry-compact.S | 154 ; This is to avoid a potential L1-L2-L1 scenario
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/linux-master/arch/s390/kernel/ |
H A D | entry.S | 142 * The following nop exists only in order to avoid that the next 206 # Let the next instruction be NOP to avoid triggering a machine check
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/linux-master/arch/x86/crypto/ |
H A D | sha1_ssse3_asm.S | 166 cmovae K_BASE, BUFFER_PTR # dummy source to avoid buffer overrun
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/linux-master/arch/arm/include/asm/ |
H A D | assembler.h | 498 @ Slightly optimised to avoid incrementing the pointer twice
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/linux-master/arch/sparc/lib/ |
H A D | M7memcpy.S | 65 * Use BIS (block initializing store) to avoid copying store cache 433 ! Using block init store (BIS) instructions to avoid fetching cache 435 ! line (similar to prefetching) to avoid overfilling STQ or miss buffers.
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/linux-master/arch/m68k/fpsp040/ |
H A D | setox.S | 65 | To avoid the use of floating-point comparisons, a 179 | in Step 7.1 to avoid unnecessary trapping. (Although 296 | precision and rounding modes. To avoid unnecessary
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/linux-master/drivers/gpu/drm/amd/amdkfd/ |
H A D | cwsr_trap_handler_gfx8.asm | 221 // Set SPI_PRIO=2 to avoid starving instruction fetch in the waves we're waiting for. 745 s_nop 0x2 // avoid S_SETREG => S_SETREG hazard
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/linux-master/arch/arm64/crypto/ |
H A D | sha512-armv8.pl | 702 sub $inp,$inp,$Xfer // avoid SEGV
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