Searched refs:ah (Results 1 - 25 of 264) sorted by relevance

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/linux-master/drivers/net/wireless/ath/ath5k/
H A Drfkill.c39 static inline void ath5k_rfkill_disable(struct ath5k_hw *ah) argument
41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n",
42 ah->rf_kill.gpio, ah->rf_kill.polarity);
43 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity);
48 static inline void ath5k_rfkill_enable(struct ath5k_hw *ah) argument
56 ath5k_rfkill_set_intr(struct ath5k_hw *ah, bool enable) argument
67 ath5k_is_rfkill_set(struct ath5k_hw *ah) argument
78 struct ath5k_hw *ah = from_tasklet(ah, t, rf_kill.toggleq); local
87 ath5k_rfkill_hw_start(struct ath5k_hw *ah) argument
104 ath5k_rfkill_hw_stop(struct ath5k_hw *ah) argument
[all...]
H A Dattach.c33 * @ah: The &struct ath5k_hw
35 static int ath5k_hw_post(struct ath5k_hw *ah) argument
54 init_val = ath5k_hw_reg_read(ah, cur_reg);
58 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
59 cur_val = ath5k_hw_reg_read(ah, cur_reg);
62 ATH5K_ERR(ah, "POST Failed !!!\n");
68 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
73 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
74 cur_val = ath5k_hw_reg_read(ah, cur_reg);
77 ATH5K_ERR(ah, "POS
104 ath5k_hw_init(struct ath5k_hw *ah) argument
350 ath5k_hw_deinit(struct ath5k_hw *ah) argument
[all...]
H A Dani.c62 * @ah: The &struct ath5k_hw
66 ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) argument
86 ATH5K_ERR(ah, "noise immunity level %d out of range",
91 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_DESIRED_SIZE,
93 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE,
95 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE,
97 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
100 ah->ani_state.noise_imm_level = level;
101 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
106 * @ah
111 ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) argument
135 ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) argument
157 ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on) argument
197 ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on) argument
223 ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as, bool ofdm_trigger) argument
310 ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
374 ath5k_hw_ani_get_listen_time(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
406 ath5k_ani_save_and_clear_phy_errors(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
475 ath5k_ani_calibration(struct ath5k_hw *ah) argument
539 ath5k_ani_mib_intr(struct ath5k_hw *ah) argument
576 ath5k_ani_phy_error_report(struct ath5k_hw *ah, enum ath5k_phy_error_code phyerr) argument
604 ath5k_enable_phy_err_counters(struct ath5k_hw *ah) argument
625 ath5k_disable_phy_err_counters(struct ath5k_hw *ah) argument
645 ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode) argument
730 ath5k_ani_print_counters(struct ath5k_hw *ah) argument
[all...]
H A Dpcu.c79 * ah->ah_ack_bitrate_high to true else base rate is
103 * @ah: The &struct ath5k_hw
114 ath5k_hw_get_frame_duration(struct ath5k_hw *ah, enum nl80211_band band, argument
122 if (!ah->ah_bwmode) {
123 __le16 raw_dur = ieee80211_generic_frame_duration(ah->hw,
139 switch (ah->ah_bwmode) {
173 * @ah: The &struct ath5k_hw
176 ath5k_hw_get_default_slottime(struct ath5k_hw *ah) argument
178 struct ieee80211_channel *channel = ah->ah_current_channel;
181 switch (ah
207 ath5k_hw_get_default_sifs(struct ath5k_hw *ah) argument
244 ath5k_hw_update_mib_counters(struct ath5k_hw *ah) argument
278 ath5k_hw_write_rate_duration(struct ath5k_hw *ah) argument
328 ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout) argument
346 ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout) argument
371 ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac) argument
399 ath5k_hw_set_bssid(struct ath5k_hw *ah) argument
448 ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask) argument
466 ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1) argument
483 ath5k_hw_get_rx_filter(struct ath5k_hw *ah) argument
512 ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter) argument
562 ath5k_hw_get_tsf64(struct ath5k_hw *ah) argument
609 ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64) argument
622 ath5k_hw_reset_tsf(struct ath5k_hw *ah) argument
648 ath5k_hw_init_beacon_timers(struct ath5k_hw *ah, u32 next_beacon, u32 interval) argument
797 ath5k_hw_check_beacon_timers(struct ath5k_hw *ah, int intval) argument
824 ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class) argument
852 ath5k_hw_start_rx_pcu(struct ath5k_hw *ah) argument
864 ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah) argument
877 ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode) argument
954 ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode) argument
[all...]
H A Dqcu.c59 * @ah: The &struct ath5k_hw
63 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue) argument
66 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
69 if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)
73 if (ah->ah_version == AR5K_AR5210)
76 pending = ath5k_hw_reg_read(ah, AR5K_QUEUE_STATUS(queue));
82 if (!pending && AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
90 * @ah: The &struct ath5k_hw
94 ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
96 if (WARN_ON(queue >= ah
138 ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, struct ath5k_txq_info *queue_info) argument
154 ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, const struct ath5k_txq_info *qinfo) argument
203 ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, struct ath5k_txq_info *queue_info) argument
281 ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, unsigned int queue) argument
324 ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
557 ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time) argument
688 ath5k_hw_init_queues(struct ath5k_hw *ah) argument
[all...]
H A Ddma.c45 * @ah: The &struct ath5k_hw
48 ath5k_hw_start_rx_dma(struct ath5k_hw *ah) argument
50 ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR);
51 ath5k_hw_reg_read(ah, AR5K_CR);
56 * @ah: The &struct ath5k_hw
59 ath5k_hw_stop_rx_dma(struct ath5k_hw *ah) argument
63 ath5k_hw_reg_write(ah, AR5K_CR_RXD, AR5K_CR);
69 (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) != 0;
74 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
82 * @ah
85 ath5k_hw_get_rxdp(struct ath5k_hw *ah) argument
98 ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) argument
130 ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue) argument
188 ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) argument
328 ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue) argument
353 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue) argument
396 ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, u32 phys_addr) argument
453 ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, bool increase) argument
506 ath5k_hw_is_intr_pending(struct ath5k_hw *ah) argument
527 ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) argument
740 ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask) argument
841 ath5k_hw_dma_init(struct ath5k_hw *ah) argument
881 ath5k_hw_dma_stop(struct ath5k_hw *ah) argument
[all...]
H A Dbase.c96 static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
200 static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp) argument
202 u64 tsf = ath5k_hw_get_tsf64(ah);
233 struct ath5k_hw *ah = hw_priv; local
234 return ath5k_hw_reg_read(ah, reg_offset);
239 struct ath5k_hw *ah = hw_priv; local
240 ath5k_hw_reg_write(ah, val, reg_offset);
256 struct ath5k_hw *ah = hw->priv; local
257 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
295 ath5k_setup_channels(struct ath5k_hw *ah, struc argument
343 ath5k_setup_rate_idx(struct ath5k_hw *ah, struct ieee80211_supported_band *b) argument
360 struct ath5k_hw *ah = hw->priv; local
446 ath5k_chan_set(struct ath5k_hw *ah, struct cfg80211_chan_def *chandef) argument
518 ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah, struct ieee80211_vif *vif) argument
575 ath5k_hw_to_driver_rix(struct ath5k_hw *ah, int hw_rix) argument
596 ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr) argument
628 ath5k_rxbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
768 ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf, struct ath5k_txq *txq, int padsize, struct ieee80211_tx_control *control) argument
898 ath5k_desc_alloc(struct ath5k_hw *ah) argument
963 ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
977 ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
993 ath5k_desc_free(struct ath5k_hw *ah) argument
1019 ath5k_txq_setup(struct ath5k_hw *ah, int qtype, int subtype) argument
1071 ath5k_beaconq_setup(struct ath5k_hw *ah) argument
1087 ath5k_beaconq_config(struct ath5k_hw *ah) argument
1155 ath5k_drain_tx_buffs(struct ath5k_hw *ah) argument
1184 ath5k_txq_release(struct ath5k_hw *ah) argument
1205 ath5k_rx_start(struct ath5k_hw *ah) argument
1246 ath5k_rx_stop(struct ath5k_hw *ah) argument
1256 ath5k_rx_decrypted(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_rx_status *rs) argument
1285 ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb, struct ieee80211_rx_status *rxs) argument
1416 ath5k_receive_frame(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_rx_status *rs) argument
1493 ath5k_receive_frame_ok(struct ath5k_hw *ah, struct ath5k_rx_status *rs) argument
1565 ath5k_set_current_imask(struct ath5k_hw *ah) argument
1589 struct ath5k_hw *ah = from_tasklet(ah, t, rxtq); local
1658 struct ath5k_hw *ah = hw->priv; local
1711 ath5k_tx_frame_completed(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_txq *txq, struct ath5k_tx_status *ts, struct ath5k_buf *bf) argument
1777 ath5k_tx_processq(struct ath5k_hw *ah, struct ath5k_txq *txq) argument
1835 struct ath5k_hw *ah = from_tasklet(ah, t, txtq); local
1854 ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
1940 struct ath5k_hw *ah = hw->priv; local
1973 ath5k_beacon_send(struct ath5k_hw *ah) argument
2091 ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf) argument
2193 ath5k_beacon_config(struct ath5k_hw *ah) argument
2226 struct ath5k_hw *ah = from_tasklet(ah, t, beacontq); local
2259 ath5k_intr_calibration_poll(struct ath5k_hw *ah) argument
2292 ath5k_schedule_rx(struct ath5k_hw *ah) argument
2299 ath5k_schedule_tx(struct ath5k_hw *ah) argument
2308 struct ath5k_hw *ah = dev_id; local
2451 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2497 struct ath5k_hw *ah = from_tasklet(ah, t, ani_tasklet); local
2508 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2574 ath5k_init_ah(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops) argument
2732 ath5k_stop_locked(struct ath5k_hw *ah) argument
2770 struct ath5k_hw *ah = hw->priv; local
2834 ath5k_stop_tasklets(struct ath5k_hw *ah) argument
2852 struct ath5k_hw *ah = hw->priv; local
2902 ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan, bool skip_pcu) argument
3017 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
3029 struct ath5k_hw *ah = hw->priv; local
3168 ath5k_deinit_ah(struct ath5k_hw *ah) argument
3202 ath5k_any_vif_assoc(struct ath5k_hw *ah) argument
3219 struct ath5k_hw *ah = hw->priv; local
3230 _ath5k_printk(const struct ath5k_hw *ah, const char *level, const char *fmt, ...) argument
[all...]
H A Dled.c90 void ath5k_led_enable(struct ath5k_hw *ah) argument
93 test_bit(ATH_STAT_LEDSOFT, ah->status)) {
94 ath5k_hw_set_gpio_output(ah, ah->led_pin);
95 ath5k_led_off(ah);
99 static void ath5k_led_on(struct ath5k_hw *ah) argument
101 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
103 ath5k_hw_set_gpio(ah, ah->led_pin, ah
106 ath5k_led_off(struct ath5k_hw *ah) argument
128 ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led, const char *name, const char *trigger) argument
157 ath5k_unregister_leds(struct ath5k_hw *ah) argument
163 ath5k_init_leds(struct ath5k_hw *ah) argument
[all...]
H A Dreset.c53 * @ah: The &struct ath5k_hw
67 ath5k_hw_register_timeout(struct ath5k_hw *ah, u32 reg, u32 flag, u32 val, argument
74 data = ath5k_hw_reg_read(ah, reg);
92 * @ah: The &struct ath5k_hw
101 ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec) argument
103 struct ath_common *common = ath5k_hw_common(ah);
109 * @ah: The &struct ath5k_hw
118 ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock) argument
120 struct ath_common *common = ath5k_hw_common(ah);
126 * @ah
132 ath5k_hw_init_core_clock(struct ath5k_hw *ah) argument
281 ath5k_hw_set_sleep_clock(struct ath5k_hw *ah, bool enable) argument
397 ath5k_hw_nic_reset(struct ath5k_hw *ah, u32 val) argument
446 ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags) argument
514 ath5k_hw_set_power_mode(struct ath5k_hw *ah, enum ath5k_power_mode mode, bool set_chip, u16 sleep_duration) argument
607 ath5k_hw_on_hold(struct ath5k_hw *ah) argument
669 ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
848 ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
976 ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
1146 ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, struct ieee80211_channel *channel, bool fast, bool skip_pcu) argument
[all...]
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dhw-ops.h24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, argument
27 if (!ah->aspm_enabled)
30 ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
33 static inline void ath9k_hw_rxena(struct ath_hw *ah) argument
35 ath9k_hw_ops(ah)->rx_enable(ah);
38 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds, argument
41 ath9k_hw_ops(ah)->set_desc_link(ds, link);
44 static inline int ath9k_hw_calibrate(struct ath_hw *ah, argument
51 ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked, u32 *sync_cause_p) argument
57 ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i) argument
63 ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, struct ath_tx_status *ts) argument
69 ath9k_hw_get_duration(struct ath_hw *ah, const void *ds, int index) argument
75 ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
81 ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
87 ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum) argument
92 ath9k_hw_tx99_stop(struct ath_hw *ah) argument
97 ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power) argument
105 ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable) argument
111 ath9k_hw_is_aic_enabled(struct ath_hw *ah) argument
123 ath9k_hw_init_hang_checks(struct ath_hw *ah) argument
128 ath9k_hw_detect_mac_hang(struct ath_hw *ah) argument
133 ath9k_hw_detect_bb_hang(struct ath_hw *ah) argument
140 ath9k_hw_rf_set_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
146 ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
152 ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, u16 modesIndex) argument
162 ath9k_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
168 ath9k_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
174 ath9k_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
180 ath9k_olc_init(struct ath_hw *ah) argument
188 ath9k_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
194 ath9k_hw_mark_phy_inactive(struct ath_hw *ah) argument
199 ath9k_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
205 ath9k_hw_rfbus_req(struct ath_hw *ah) argument
210 ath9k_hw_rfbus_done(struct ath_hw *ah) argument
215 ath9k_hw_restore_chainmask(struct ath_hw *ah) argument
223 ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
229 ath9k_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
235 ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
241 ath9k_hw_setup_calibration(struct ath_hw *ah, struct ath9k_cal_list *currCal) argument
247 ath9k_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
255 ath9k_hw_set_radar_params(struct ath_hw *ah) argument
263 ath9k_hw_init_cal_settings(struct ath_hw *ah) argument
268 ath9k_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
274 ath9k_hw_init_mode_gain_regs(struct ath_hw *ah) argument
282 ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah) argument
[all...]
H A Dar9003_hw.c41 static void ar9003_hw_init_mode_regs(struct ath_hw *ah) argument
43 if (AR_SREV_9330_11(ah)) {
45 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
47 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
51 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
53 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
57 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
61 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
63 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
67 INIT_INI_ARRAY(&ah
591 ar9003_tx_gain_table_mode0(struct ath_hw *ah) argument
640 ar9003_tx_gain_table_mode1(struct ath_hw *ah) argument
690 ar9003_tx_gain_table_mode2(struct ath_hw *ah) argument
724 ar9003_tx_gain_table_mode3(struct ath_hw *ah) argument
757 ar9003_tx_gain_table_mode4(struct ath_hw *ah) argument
776 ar9003_tx_gain_table_mode5(struct ath_hw *ah) argument
792 ar9003_tx_gain_table_mode6(struct ath_hw *ah) argument
805 ar9003_tx_gain_table_mode7(struct ath_hw *ah) argument
814 ar9003_tx_gain_table_apply(struct ath_hw *ah) argument
834 ar9003_rx_gain_table_mode0(struct ath_hw *ah) argument
885 ar9003_rx_gain_table_mode1(struct ath_hw *ah) argument
939 ar9003_rx_gain_table_mode2(struct ath_hw *ah) argument
962 ar9003_rx_gain_table_mode3(struct ath_hw *ah) argument
977 ar9003_rx_gain_table_apply(struct ath_hw *ah) argument
997 ar9003_hw_init_mode_gain_regs(struct ath_hw *ah) argument
1012 ar9003_hw_configpcipowersave(struct ath_hw *ah, bool power_off) argument
1053 ar9003_hw_init_hang_checks(struct ath_hw *ah) argument
1098 ath9k_hw_verify_hang(struct ath_hw *ah, unsigned int queue) argument
1130 ar9003_hw_detect_mac_hang(struct ath_hw *ah) argument
1174 ar9003_hw_attach_ops(struct ath_hw *ah) argument
[all...]
H A Dar9003_rtt.h21 void ar9003_hw_rtt_enable(struct ath_hw *ah);
22 void ar9003_hw_rtt_disable(struct ath_hw *ah);
23 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask);
24 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah);
25 void ar9003_hw_rtt_load_hist(struct ath_hw *ah);
26 void ar9003_hw_rtt_fill_hist(struct ath_hw *ah);
27 void ar9003_hw_rtt_clear_hist(struct ath_hw *ah);
28 bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan);
30 static inline void ar9003_hw_rtt_enable(struct ath_hw *ah) argument
34 static inline void ar9003_hw_rtt_disable(struct ath_hw *ah) argument
38 ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask) argument
42 ar9003_hw_rtt_force_restore(struct ath_hw *ah) argument
47 ar9003_hw_rtt_load_hist(struct ath_hw *ah) argument
51 ar9003_hw_rtt_fill_hist(struct ath_hw *ah) argument
55 ar9003_hw_rtt_clear_hist(struct ath_hw *ah) argument
59 ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
H A Dar9002_hw.c26 static int ar9002_hw_init_mode_regs(struct ath_hw *ah) argument
28 if (AR_SREV_9271(ah)) {
29 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
30 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
31 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
35 INIT_INI_ARRAY(&ah->iniPcieSerdes,
38 if (AR_SREV_9287_11_OR_LATER(ah)) {
39 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
40 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);
41 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
107 ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah) argument
129 ar9280_20_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) argument
144 ar9271_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) argument
154 ar9002_hw_init_mode_gain_regs(struct ath_hw *ah) argument
202 ar9002_hw_configpcipowersave(struct ath_hw *ah, bool power_off) argument
324 ar9002_hw_get_radiorev(struct ath_hw *ah) argument
343 ar9002_hw_rf_claim(struct ath_hw *ah) argument
371 ar9002_hw_enable_async_fifo(struct ath_hw *ah) argument
384 ar9002_hw_init_hang_checks(struct ath_hw *ah) argument
399 ar9002_hw_attach_ops(struct ath_hw *ah) argument
426 ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
H A Dar9002_calib.c31 static bool ar9002_hw_is_cal_supported(struct ath_hw *ah, argument
36 switch (ah->supp_cals & cal_type) {
50 static void ar9002_hw_setup_calibration(struct ath_hw *ah, argument
53 struct ath_common *common = ath9k_hw_common(ah);
55 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
61 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
66 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
70 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
75 REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
79 static bool ar9002_hw_per_calibration(struct ath_hw *ah, argument
125 ar9002_hw_iqcal_collect(struct ath_hw *ah) argument
144 ar9002_hw_adc_gaincal_collect(struct ath_hw *ah) argument
168 ar9002_hw_adc_dccal_collect(struct ath_hw *ah) argument
192 ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) argument
269 ar9002_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains) argument
323 ar9002_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains) argument
377 ar9287_hw_olc_temp_compensation(struct ath_hw *ah) argument
407 ar9280_hw_olc_temp_compensation(struct ath_hw *ah) argument
437 ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
541 ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
645 ar9002_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
660 ar9002_hw_olc_temp_compensation(struct ath_hw *ah) argument
668 ar9002_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan, u8 rxchainmask, bool longcal) argument
747 ar9285_hw_cl_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
789 ar9285_hw_clc(struct ath_hw *ah, struct ath9k_channel *chan) argument
845 ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
980 ar9002_hw_init_cal_settings(struct ath_hw *ah) argument
1009 ar9002_hw_attach_calib_ops(struct ath_hw *ah) argument
[all...]
H A Dar9003_wow.c23 static void ath9k_hw_set_sta_powersave(struct ath_hw *ah) argument
25 if (!ath9k_hw_mci_is_enabled(ah))
31 if (ar9003_mci_state(ah, MCI_STATE_GET_WLAN_PS_STATE) != MCI_PS_DISABLE)
34 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
37 static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah) argument
39 struct ath_common *common = ath9k_hw_common(ah);
41 ath9k_hw_set_sta_powersave(ah);
44 REG_WRITE(ah, AR_CR, AR_CR_RXD);
46 if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE(ah),
67 ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah) argument
121 ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern, u8 *user_mask, int pattern_count, int pattern_len) argument
183 ath9k_hw_wow_wakeup(struct ath_hw *ah) argument
269 ath9k_hw_wow_set_arwr_reg(struct ath_hw *ah) argument
289 ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable) argument
[all...]
H A Dbtcoex.c59 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum) argument
61 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
79 if (AR_SREV_9300_20_OR_LATER(ah))
82 if (AR_SREV_SOC(ah)) {
114 static void ath9k_hw_btcoex_pin_init(struct ath_hw *ah, u8 wlanactive_gpio, argument
117 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
118 struct ath9k_platform_data *pdata = ah->dev->platform_data;
137 void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah) argument
139 struct ath_common *common = ath9k_hw_common(ah);
140 struct ath_btcoex_hw *btcoex_hw = &ah
171 ath9k_hw_btcoex_init_2wire(struct ath_hw *ah) argument
195 ath9k_hw_btcoex_init_3wire(struct ath_hw *ah) argument
223 ath9k_hw_btcoex_deinit(struct ath_hw *ah) argument
233 ath9k_hw_btcoex_init_mci(struct ath_hw *ah) argument
257 ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah) argument
271 ath9k_hw_btcoex_set_weight(struct ath_hw *ah, u32 bt_weight, u32 wlan_weight, enum ath_stomp_type stomp_type) argument
320 ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah) argument
362 ath9k_hw_btcoex_enable_mci(struct ath_hw *ah) argument
375 ath9k_hw_btcoex_disable_mci(struct ath_hw *ah) argument
387 ath9k_hw_btcoex_enable(struct ath_hw *ah) argument
416 ath9k_hw_btcoex_disable(struct ath_hw *ah) argument
453 ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah, enum ath_stomp_type stomp_type) argument
481 ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio) argument
[all...]
H A Dcommon-beacon.h19 int ath9k_cmn_beacon_config_sta(struct ath_hw *ah,
22 void ath9k_cmn_beacon_config_adhoc(struct ath_hw *ah,
24 void ath9k_cmn_beacon_config_ap(struct ath_hw *ah,
H A Dar9003_phy.c126 * @ah: atheros hardware structure
149 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) argument
156 ath9k_hw_get_channel_centers(ah, chan, &centers);
160 if (AR_SREV_9330(ah) || AR_SREV_9485(ah) ||
161 AR_SREV_9531(ah) || AR_SREV_9550(ah) ||
162 AR_SREV_9561(ah) || AR_SREV_9565(ah)) {
163 if (ah
238 ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah, struct ath9k_channel *chan) argument
326 ar9003_hw_spur_ofdm_clear(struct ath_hw *ah) argument
369 ar9003_hw_spur_ofdm(struct ath_hw *ah, int freq_offset, int spur_freq_sd, int spur_delta_phase, int spur_subchannel_sd, int range, int synth_freq) argument
436 ar9003_hw_spur_ofdm_9565(struct ath_hw *ah, int freq_offset) argument
469 ar9003_hw_spur_ofdm_work(struct ath_hw *ah, struct ath9k_channel *chan, int freq_offset, int range, int synth_freq) argument
520 ar9003_hw_spur_mitigate_ofdm(struct ath_hw *ah, struct ath9k_channel *chan) argument
568 ar9003_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) argument
576 ar9003_hw_compute_pll_control_soc(struct ath_hw *ah, struct ath9k_channel *chan) argument
593 ar9003_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
610 ar9003_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
650 ar9003_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
667 ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) argument
685 ar9003_hw_override_ini(struct ath_hw *ah) argument
741 ar9003_hw_prog_ini(struct ath_hw *ah, struct ar5416IniArray *iniArr, int column) argument
769 ar9550_hw_get_modes_txgain_index(struct ath_hw *ah, struct ath9k_channel *chan) argument
794 ar9561_hw_get_modes_txgain_index(struct ath_hw *ah, struct ath9k_channel *chan) argument
807 ar9003_doubler_fix(struct ath_hw *ah) argument
855 ar9003_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
967 ar9003_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
990 ar9003_hw_mark_phy_inactive(struct ath_hw *ah) argument
995 ar9003_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
1042 ar9003_hw_rfbus_req(struct ath_hw *ah) argument
1053 ar9003_hw_rfbus_done(struct ath_hw *ah) argument
1062 ar9003_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
1336 ar9003_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
1364 ar9003_hw_set_nf_limits(struct ath_hw *ah) argument
1389 ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah) argument
1441 ar9003_hw_set_radar_params(struct ath_hw *ah, struct ath_hw_radar_conf *conf) argument
1481 ar9003_hw_set_radar_conf(struct ath_hw *ah) argument
1495 ar9003_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
1527 ar9003_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
1554 ar9003_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable) argument
1664 ar9003_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
1730 ar9003_hw_spectral_scan_config(struct ath_hw *ah, struct ath_spec_scan *param) argument
1771 ar9003_hw_spectral_scan_trigger(struct ath_hw *ah) argument
1780 ar9003_hw_spectral_scan_wait(struct ath_hw *ah) argument
1793 ar9003_hw_tx99_start(struct ath_hw *ah, u32 qnum) argument
1806 ar9003_hw_tx99_stop(struct ath_hw *ah) argument
1812 ar9003_hw_tx99_set_txpower(struct ath_hw *ah, u8 txpower) argument
1824 ar9003_hw_init_txpower_cck(struct ath_hw *ah, u8 *rate_array) argument
1834 ar9003_hw_init_txpower_ofdm(struct ath_hw *ah, u8 *rate_array, int offset) argument
1846 ar9003_hw_init_txpower_ht(struct ath_hw *ah, u8 *rate_array, int ss_offset, int ds_offset, int ts_offset, bool is_40) argument
1872 ar9003_hw_init_txpower_stbc(struct ath_hw *ah, int ss_offset, int ds_offset, int ts_offset) argument
1883 ar9003_hw_init_rate_txpower(struct ath_hw *ah, u8 *rate_array, struct ath9k_channel *chan) argument
1918 ar9003_hw_attach_phy_ops(struct ath_hw *ah) argument
1998 ar9003_hw_bb_watchdog_check(struct ath_hw *ah) argument
2035 ar9003_hw_bb_watchdog_config(struct ath_hw *ah) argument
2094 ar9003_hw_bb_watchdog_read(struct ath_hw *ah) argument
2110 ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah) argument
2149 ar9003_hw_disable_phy_restart(struct ath_hw *ah) argument
[all...]
H A Dar9003_rtt.c38 void ar9003_hw_rtt_enable(struct ath_hw *ah) argument
40 REG_WRITE(ah, AR_PHY_RTT_CTRL, 1);
43 void ar9003_hw_rtt_disable(struct ath_hw *ah) argument
45 REG_WRITE(ah, AR_PHY_RTT_CTRL, 0);
48 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask) argument
50 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
54 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah) argument
56 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
61 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
64 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTR
72 ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain, u32 index, u32 data28) argument
104 ar9003_hw_rtt_load_hist(struct ath_hw *ah) argument
121 ar9003_hw_patch_rtt(struct ath_hw *ah, int index, int chain) argument
142 ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index) argument
169 ar9003_hw_rtt_fill_hist(struct ath_hw *ah) argument
191 ar9003_hw_rtt_clear_hist(struct ath_hw *ah) argument
206 ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
H A Dani.c107 static void ath9k_hw_update_mibstats(struct ath_hw *ah, argument
114 REG_READ_MULTI(ah, &addr[0], &data[0], 5);
127 static void ath9k_ani_restart(struct ath_hw *ah) argument
129 struct ar5416AniState *aniState = &ah->ani;
133 ENABLE_REGWRITE_BUFFER(ah);
135 REG_WRITE(ah, AR_PHY_ERR_1, 0);
136 REG_WRITE(ah, AR_PHY_ERR_2, 0);
137 REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
138 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
140 REGWRITE_BUFFER_FLUSH(ah);
149 ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel, bool scan) argument
218 ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah) argument
229 ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel, bool scan) argument
273 ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah) argument
286 ath9k_hw_ani_lower_immunity(struct ath_hw *ah) argument
309 ath9k_ani_reset(struct ath_hw *ah, bool is_scanning) argument
369 ath9k_hw_ani_read_counters(struct ath_hw *ah) argument
401 ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan) argument
441 ath9k_enable_mib_counters(struct ath_hw *ah) argument
463 ath9k_hw_disable_mib_counters(struct ath_hw *ah) argument
477 ath9k_hw_ani_init(struct ath_hw *ah) argument
[all...]
H A Dhw.c33 static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);
39 static void ath9k_hw_set_clockrate(struct ath_hw *ah) argument
41 struct ath_common *common = ath9k_hw_common(ah);
42 struct ath9k_channel *chan = ah->curchan;
46 if (AR_SREV_9287(ah) && AR_SREV_9287_13_OR_LATER(ah))
52 else if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
69 static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) argument
71 struct ath_common *common = ath9k_hw_common(ah);
76 bool ath9k_hw_wait(struct ath_hw *ah, u3 argument
97 ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan, int hw_delay) argument
110 ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array, int column, unsigned int *writecnt) argument
124 ath9k_hw_read_array(struct ath_hw *ah, u32 array[][2], int size) argument
166 ath9k_hw_computetxtime(struct ath_hw *ah, u8 phy, int kbps, u32 frameLen, u16 rateix, bool shortPreamble) argument
221 ath9k_hw_get_channel_centers(struct ath_hw *ah, struct ath9k_channel *chan, struct chan_centers *centers) argument
254 ath9k_hw_read_revisions(struct ath_hw *ah) argument
325 ath9k_hw_disablepcie(struct ath_hw *ah) argument
344 ath9k_hw_chip_test(struct ath_hw *ah) argument
394 ath9k_hw_init_config(struct ath_hw *ah) argument
454 ath9k_hw_init_defaults(struct ath_hw *ah) argument
486 ath9k_hw_init_macaddr(struct ath_hw *ah) argument
516 ath9k_hw_post_init(struct ath_hw *ah) argument
557 ath9k_hw_attach_ops(struct ath_hw *ah) argument
567 __ath9k_hw_init(struct ath_hw *ah) argument
663 ath9k_hw_init(struct ath_hw *ah) argument
714 ath9k_hw_init_qos(struct ath_hw *ah) argument
735 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah) argument
760 ath9k_hw_init_pll(struct ath_hw *ah, struct ath9k_channel *chan) argument
931 ath9k_hw_init_interrupt_masks(struct ath_hw *ah, enum nl80211_iftype opmode) argument
1005 ath9k_hw_set_sifs_time(struct ath_hw *ah, u32 us) argument
1012 ath9k_hw_setslottime(struct ath_hw *ah, u32 us) argument
1019 ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us) argument
1026 ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us) argument
1033 ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu) argument
1047 ath9k_hw_init_global_settings(struct ath_hw *ah) argument
1161 ath9k_hw_deinit(struct ath_hw *ah) argument
1192 ath9k_hw_set_dma(struct ath_hw *ah) argument
1266 ath9k_hw_set_operating_mode(struct ath_hw *ah, int opmode) argument
1297 ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled, u32 *coef_mantissa, u32 *coef_exponent) argument
1319 ath9k_hw_ar9330_reset_war(struct ath_hw *ah, int type) argument
1350 ath9k_hw_set_reset(struct ath_hw *ah, int type) argument
1443 ath9k_hw_set_reset_power_on(struct ath_hw *ah) argument
1481 ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type) argument
1513 ath9k_hw_chip_reset(struct ath_hw *ah, struct ath9k_channel *chan) argument
1542 ath9k_hw_channel_change(struct ath_hw *ah, struct ath9k_channel *chan) argument
1612 ath9k_hw_apply_gpio_override(struct ath_hw *ah) argument
1627 ath9k_hw_check_nav(struct ath_hw *ah) argument
1640 ath9k_hw_check_alive(struct ath_hw *ah) argument
1680 ath9k_hw_init_mfp(struct ath_hw *ah) argument
1707 ath9k_hw_reset_opmode(struct ath_hw *ah, u32 macStaId1, u32 saveDefAntenna) argument
1729 ath9k_hw_init_queues(struct ath_hw *ah) argument
1748 ath9k_hw_init_desc(struct ath_hw *ah) argument
1787 ath9k_hw_do_fastcc(struct ath_hw *ah, struct ath9k_channel *chan) argument
1867 ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, struct ath9k_hw_cal_data *caldata, bool fastcc) argument
2097 ath9k_set_power_sleep(struct ath_hw *ah) argument
2138 ath9k_set_power_network_sleep(struct ath_hw *ah) argument
2177 ath9k_hw_set_power_awake(struct ath_hw *ah) argument
2230 ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode) argument
2284 ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period) argument
2321 ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, const struct ath9k_beacon_state *bs) argument
2415 ath9k_hw_dfs_tested(struct ath_hw *ah) argument
2429 ath9k_gpio_cap_init(struct ath_hw *ah) argument
2484 ath9k_hw_fill_cap_info(struct ath_hw *ah) argument
2698 ath9k_hw_gpio_cfg_output_mux(struct ath_hw *ah, u32 gpio, u32 type) argument
2727 ath9k_hw_gpio_cfg_soc(struct ath_hw *ah, u32 gpio, bool out, const char *label) argument
2745 ath9k_hw_gpio_cfg_wmac(struct ath_hw *ah, u32 gpio, bool out, u32 ah_signal_type) argument
2771 ath9k_hw_gpio_request(struct ath_hw *ah, u32 gpio, bool out, const char *label, u32 ah_signal_type) argument
2784 ath9k_hw_gpio_request_in(struct ath_hw *ah, u32 gpio, const char *label) argument
2790 ath9k_hw_gpio_request_out(struct ath_hw *ah, u32 gpio, const char *label, u32 ah_signal_type) argument
2797 ath9k_hw_gpio_free(struct ath_hw *ah, u32 gpio) argument
2811 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio) argument
2845 ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val) argument
2867 ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna) argument
2877 ath9k_hw_getrxfilter(struct ath_hw *ah) argument
2891 ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits) argument
2915 ath9k_hw_phy_disable(struct ath_hw *ah) argument
2929 ath9k_hw_disable(struct ath_hw *ah) argument
2942 get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan) argument
2954 ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan, bool test) argument
2976 ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test) argument
2993 ath9k_hw_setopmode(struct ath_hw *ah) argument
2999 ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1) argument
3006 ath9k_hw_write_associd(struct ath_hw *ah) argument
3018 ath9k_hw_gettsf64(struct ath_hw *ah) argument
3038 ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64) argument
3045 ath9k_hw_reset_tsf(struct ath_hw *ah) argument
3056 ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set) argument
3065 ath9k_hw_set11nmac2040(struct ath_hw *ah, struct ath9k_channel *chan) argument
3108 ath9k_hw_gettsf32(struct ath_hw *ah) argument
3114 ath9k_hw_gen_timer_start_tsf2(struct ath_hw *ah) argument
3124 ath_gen_timer_alloc(struct ath_hw *ah, void (*trigger)(void *), void (*overflow)(void *), void *arg, u8 timer_index) argument
3161 ath9k_hw_gen_timer_start(struct ath_hw *ah, struct ath_gen_timer *timer, u32 timer_next, u32 timer_period) argument
3211 ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer) argument
3243 ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer) argument
3256 ath_gen_timer_isr(struct ath_hw *ah) argument
3365 ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len) argument
[all...]
H A Dar9003_mci.c24 static void ar9003_mci_reset_req_wakeup(struct ath_hw *ah) argument
26 REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
29 REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
33 static int ar9003_mci_wait_for_interrupt(struct ath_hw *ah, u32 address, argument
36 struct ath_common *common = ath9k_hw_common(ah);
39 if (!(REG_READ(ah, address) & bit_position)) {
48 REG_WRITE(ah, address, bit_position);
54 ar9003_mci_reset_req_wakeup(ah);
58 REG_WRITE(ah, AR_MCI_INTERRUPT_RAW,
61 REG_WRITE(ah, AR_MCI_INTERRUPT_RA
79 ar9003_mci_remote_reset(struct ath_hw *ah, bool wait_done) argument
88 ar9003_mci_send_lna_transfer(struct ath_hw *ah, bool wait_done) argument
96 ar9003_mci_send_req_wake(struct ath_hw *ah, bool wait_done) argument
103 ar9003_mci_send_sys_waking(struct ath_hw *ah, bool wait_done) argument
109 ar9003_mci_send_lna_take(struct ath_hw *ah, bool wait_done) argument
117 ar9003_mci_send_sys_sleeping(struct ath_hw *ah, bool wait_done) argument
124 ar9003_mci_send_coex_version_query(struct ath_hw *ah, bool wait_done) argument
139 ar9003_mci_send_coex_version_response(struct ath_hw *ah, bool wait_done) argument
154 ar9003_mci_send_coex_wlan_channels(struct ath_hw *ah, bool wait_done) argument
170 ar9003_mci_send_coex_bt_status_query(struct ath_hw *ah, bool wait_done, u8 query_type) argument
201 ar9003_mci_send_coex_halt_bt_gpm(struct ath_hw *ah, bool halt, bool wait_done) argument
224 ar9003_mci_prep_interface(struct ath_hw *ah) argument
321 ar9003_mci_set_full_sleep(struct ath_hw *ah) argument
334 ar9003_mci_disable_interrupt(struct ath_hw *ah) argument
340 ar9003_mci_enable_interrupt(struct ath_hw *ah) argument
347 ar9003_mci_check_int(struct ath_hw *ah, u32 ints) argument
355 ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr, u32 *rx_msg_intr) argument
369 ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked) argument
394 ar9003_mci_2g5g_changed(struct ath_hw *ah, bool is_2g) argument
405 ar9003_mci_is_gpm_valid(struct ath_hw *ah, u32 msg_index) argument
425 ar9003_mci_observation_set_up(struct ath_hw *ah) argument
478 ar9003_mci_send_coex_bt_flags(struct ath_hw *ah, bool wait_done, u8 opcode, u32 bt_flags) argument
496 ar9003_mci_sync_bt_state(struct ath_hw *ah) argument
516 ar9003_mci_check_bt(struct ath_hw *ah) argument
536 ar9003_mci_process_gpm_extra(struct ath_hw *ah, u8 gpm_type, u8 gpm_opcode, u32 *p_gpm) argument
583 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type, u8 gpm_opcode, int time_out) argument
691 ar9003_mci_start_reset(struct ath_hw *ah, struct ath9k_channel *chan) argument
731 ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan, struct ath9k_hw_cal_data *caldata) argument
785 ar9003_mci_mute_bt(struct ath_hw *ah) argument
813 ar9003_mci_osla_setup(struct ath_hw *ah, bool enable) argument
844 ar9003_mci_stat_setup(struct ath_hw *ah) argument
863 ar9003_mci_set_btcoex_ctrl_9565_1ANT(struct ath_hw *ah) argument
882 ar9003_mci_set_btcoex_ctrl_9565_2ANT(struct ath_hw *ah) argument
901 ar9003_mci_set_btcoex_ctrl_9462(struct ath_hw *ah) argument
918 ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g, bool is_full_sleep) argument
1038 ar9003_mci_stop_bt(struct ath_hw *ah, bool save_fullsleep) argument
1054 ar9003_mci_send_2g5g_status(struct ath_hw *ah, bool wait_done) argument
1080 ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header, u32 *payload, bool queue) argument
1129 ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force) argument
1165 ar9003_mci_send_message(struct ath_hw *ah, u8 header, u32 flag, u32 *payload, u8 len, bool wait_done, bool check_bt) argument
1230 ar9003_mci_init_cal_req(struct ath_hw *ah, bool *is_reusable) argument
1253 ar9003_mci_init_cal_done(struct ath_hw *ah) argument
1267 ar9003_mci_setup(struct ath_hw *ah, u32 gpm_addr, void *gpm_buf, u16 len, u32 sched_addr) argument
1281 ar9003_mci_cleanup(struct ath_hw *ah) argument
1289 ar9003_mci_state(struct ath_hw *ah, u32 state_type) argument
1403 ar9003_mci_bt_gain_ctrl(struct ath_hw *ah) argument
1422 ar9003_mci_set_power_awake(struct ath_hw *ah) argument
1456 ar9003_mci_check_gpm_offset(struct ath_hw *ah) argument
1475 ar9003_mci_get_next_gpm_offset(struct ath_hw *ah, u32 *more) argument
1550 ar9003_mci_set_bt_version(struct ath_hw *ah, u8 major, u8 minor) argument
1562 ar9003_mci_send_wlan_channels(struct ath_hw *ah) argument
1571 ar9003_mci_get_max_txpower(struct ath_hw *ah, u8 ctlmode) argument
[all...]
H A Dar9002_phy.c47 * @ah: atheros hardware structure
66 static int ar9002_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) argument
73 ath9k_hw_get_channel_centers(ah, chan, &centers);
76 reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL);
88 if (AR_SREV_9287_11_OR_LATER(ah)) {
91 REG_WRITE_ARRAY(&ah->iniCckfirJapan2484,
94 REG_WRITE_ARRAY(&ah->iniCckfirNormal,
98 txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
101 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
104 REG_WRITE(ah, AR_PHY_CCK_TX_CTR
168 ar9002_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) argument
280 ar9002_olc_init(struct ath_hw *ah) argument
304 ar9002_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
331 ar9002_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
354 ar9002_hw_set_nf_limits(struct ath_hw *ah) argument
378 ar9002_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
395 ar9002_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
416 ar9002_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable) argument
477 ar9002_hw_spectral_scan_config(struct ath_hw *ah, struct ath_spec_scan *param) argument
534 ar9002_hw_spectral_scan_trigger(struct ath_hw *ah) argument
542 ar9002_hw_spectral_scan_wait(struct ath_hw *ah) argument
555 ar9002_hw_tx99_start(struct ath_hw *ah, u32 qnum) argument
570 ar9002_hw_tx99_stop(struct ath_hw *ah) argument
575 ar9002_hw_attach_phy_ops(struct ath_hw *ah) argument
[all...]
H A Dmac.c21 static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah, argument
24 ath_dbg(ath9k_hw_common(ah), INTERRUPT,
26 ah->txok_interrupt_mask, ah->txerr_interrupt_mask,
27 ah->txdesc_interrupt_mask, ah->txeol_interrupt_mask,
28 ah->txurn_interrupt_mask);
30 ENABLE_REGWRITE_BUFFER(ah);
32 REG_WRITE(ah, AR_IMR_S0,
33 SM(ah
46 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q) argument
52 ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp) argument
58 ath9k_hw_txstart(struct ath_hw *ah, u32 q) argument
65 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q) argument
105 ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel) argument
134 ath9k_hw_abort_tx_dma(struct ath_hw *ah) argument
170 ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q) argument
196 ath9k_hw_set_txq_props(struct ath_hw *ah, int q, const struct ath9k_tx_queue_info *qinfo) argument
261 ath9k_hw_get_txq_props(struct ath_hw *ah, int q, struct ath9k_tx_queue_info *qinfo) argument
293 ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type, const struct ath9k_tx_queue_info *qinfo) argument
337 ath9k_hw_clear_queue_interrupts(struct ath_hw *ah, u32 q) argument
346 ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q) argument
367 ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q) argument
524 ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, struct ath_rx_status *rs) argument
639 ath9k_hw_setrxabort(struct ath_hw *ah, bool set) argument
669 ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp) argument
675 ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning) argument
685 ath9k_hw_abortpcurecv(struct ath_hw *ah) argument
693 ath9k_hw_stopdmarecv(struct ath_hw *ah, bool *reset) argument
742 ath9k_hw_beaconq_setup(struct ath_hw *ah) argument
758 ath9k_hw_intrpend(struct ath_hw *ah) argument
781 ath9k_hw_kill_interrupts(struct ath_hw *ah) argument
798 ath9k_hw_disable_interrupts(struct ath_hw *ah) argument
809 __ath9k_hw_enable_interrupts(struct ath_hw *ah) argument
874 ath9k_hw_resume_interrupts(struct ath_hw *ah) argument
891 ath9k_hw_enable_interrupts(struct ath_hw *ah) argument
908 ath9k_hw_set_interrupts(struct ath_hw *ah) argument
1031 ath9k_hw_set_tx_filter(struct ath_hw *ah, u8 destidx, bool set) argument
[all...]
H A Dcalib.c47 static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah, argument
53 limit = &ah->nf_2g;
55 limit = &ah->nf_5g;
60 static s16 ath9k_hw_get_default_nf(struct ath_hw *ah, argument
64 s16 calib_nf = ath9k_hw_get_nf_limits(ah, chan)->cal[chain];
69 return ath9k_hw_get_nf_limits(ah, chan)->nominal;
72 s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan, argument
79 ath9k_hw_get_default_nf(ah, chan, 0);
87 static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah, argument
91 struct ath_common *common = ath9k_hw_common(ah);
153 ath9k_hw_get_nf_thresh(struct ath_hw *ah, enum nl80211_band band, int16_t *nft) argument
172 ath9k_hw_reset_calibration(struct ath_hw *ah, struct ath9k_cal_list *currCal) argument
193 ath9k_hw_reset_calvalid(struct ath_hw *ah) argument
229 ath9k_hw_start_nfcal(struct ath_hw *ah, bool update) argument
247 ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan) argument
371 ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf) argument
404 ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan) argument
443 ath9k_init_nfcal_hist_buffer(struct ath_hw *ah, struct ath9k_channel *chan) argument
464 ath9k_hw_bstuck_nfcal(struct ath_hw *ah) argument
[all...]

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