ath/ath9k/ar9003_rtt.c

38 void ar9003_hw_rtt_enable(struct ath_hw *ah)
40 	REG_WRITE(ah, AR_PHY_RTT_CTRL, 1);
43 void ar9003_hw_rtt_disable(struct ath_hw *ah)
45 	REG_WRITE(ah, AR_PHY_RTT_CTRL, 0);
48 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask)
50 	REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
54 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah)
56 	if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
61 	REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
64 	if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
72 static void ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain,
78 	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain), val);
83 	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
87 	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
90 	if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
96 	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
99 	ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
104 void ar9003_hw_rtt_load_hist(struct ath_hw *ah)
109 		if (!(ah->caps.rx_chainmask & (1 << chain)))
112 			ar9003_hw_rtt_load_hist_entry(ah, chain, i,
113 					      ah->caldata->rtt_table[chain][i]);
114 			ath_dbg(ath9k_hw_common(ah), CALIBRATE,
116 				i, chain, ah->caldata->rtt_table[chain][i]);
121 static void ar9003_hw_patch_rtt(struct ath_hw *ah, int index, int chain)
125 	if (!test_bit(SW_PKDET_DONE, &ah->caldata->cal_flags))
131 	agc = REG_READ_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
136 	caldac = ah->caldata->caldac[chain];
137 	ah->caldata->rtt_table[chain][index] &= 0xFFFF05FF;
139 	ah->caldata->rtt_table[chain][index] |= (caldac << 4);
142 static int ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index)
150 	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
154 	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
157 	if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
162 	val = MS(REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain)),
169 void ar9003_hw_rtt_fill_hist(struct ath_hw *ah)
174 		if (!(ah->caps.rx_chainmask & (1 << chain)))
177 			ah->caldata->rtt_table[chain][i] =
178 				ar9003_hw_rtt_fill_hist_entry(ah, chain, i);
180 			ar9003_hw_patch_rtt(ah, i, chain);
182 			ath_dbg(ath9k_hw_common(ah), CALIBRATE,
184 				i, chain, ah->caldata->rtt_table[chain][i]);
188 	set_bit(RTT_DONE, &ah->caldata->cal_flags);
191 void ar9003_hw_rtt_clear_hist(struct ath_hw *ah)
196 		if (!(ah->caps.rx_chainmask & (1 << chain)))
199 			ar9003_hw_rtt_load_hist_entry(ah, chain, i, 0);
202 	if (ah->caldata)
203 		clear_bit(RTT_DONE, &ah->caldata->cal_flags);
206 bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan)
210 	if (!ah->caldata)
213 	if (test_bit(SW_PKDET_DONE, &ah->caldata->cal_flags)) {
215 			REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(0),
217 				      ah->caldata->caldac[0]);
218 			REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(1),
220 				      ah->caldata->caldac[1]);
222 			REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(0),
224 				      ah->caldata->caldac[0]);
225 			REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(1),
227 				      ah->caldata->caldac[1]);
229 		REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(1),
231 		REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(0),
235 	if (!test_bit(RTT_DONE, &ah->caldata->cal_flags))
238 	ar9003_hw_rtt_enable(ah);
240 	if (test_bit(SW_PKDET_DONE, &ah->caldata->cal_flags))
241 		ar9003_hw_rtt_set_mask(ah, 0x30);
243 		ar9003_hw_rtt_set_mask(ah, 0x10);
245 	if (!ath9k_hw_rfbus_req(ah)) {
246 		ath_err(ath9k_hw_common(ah), "Could not stop baseband\n");
251 	ar9003_hw_rtt_load_hist(ah);
252 	restore = ar9003_hw_rtt_force_restore(ah);
255 	ath9k_hw_rfbus_done(ah);
256 	ar9003_hw_rtt_disable(ah);