Searched refs:SSPP_VIG0 (Results 1 - 25 of 30) sorted by last modified time

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/linux-master/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_9_2_x1e80100.h66 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_3_2_sdm660.h64 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_3_3_sdm630.h63 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_9_0_sm8550.h67 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_8_1_sm8450.h76 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_8_0_sc8280xp.h75 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_9_sm6375.h40 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_7_0_sm8350.h75 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_7_2_sc7280.h57 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_4_sm6350.h59 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_5_qcm2290.h39 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_3_sm6115.h39 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_0_sm8250.h75 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_2_sc7180.h52 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_5_4_sm6125.h69 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_5_1_sc8180x.h75 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_5_0_sm8150.h76 .name = "sspp_0", .id = SSPP_VIG0,
/linux-master/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_kms.c607 SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3,
H A Dmdp5_ctl.c292 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage);
315 case SSPP_VIG0: return MDP5_CTL_LAYER_EXT_REG_VIG0_BIT3;
443 case SSPP_VIG0: return MDP5_CTL_FLUSH_VIG0;
H A Dmdp5_cfg.c28 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
117 [SSPP_VIG0] = 1,
198 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
286 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
386 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
458 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
538 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
757 [SSPP_VIG0] = 1, [SSPP_VIG1] = 9,
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_kms.c88 for (i = SSPP_VIG0; i < SSPP_MAX; i++)
89 seq_printf(s, "SSPP%d : 0x%x \n", i - SSPP_VIG0,
H A Ddpu_hw_ctl.c182 case SSPP_VIG0:
462 [SSPP_VIG0] = { { 0, 0, 0 }, { 3, 0 } },
H A Ddpu_plane.c238 pipe->sspp->idx - SSPP_VIG0,
282 pdpu->pipe - SSPP_VIG0,
286 trace_dpu_perf_set_qos_luts(pipe->sspp->idx - SSPP_VIG0,
291 pdpu->pipe - SSPP_VIG0,
295 trace_dpu_perf_set_danger_luts(pdpu->pipe - SSPP_VIG0,
302 pdpu->pipe - SSPP_VIG0,
327 pdpu->pipe - SSPP_VIG0,
406 qos_params.num = pipe->sspp->idx - SSPP_VIG0;
H A Ddpu_hw_top.c94 status->sspp[SSPP_VIG0] = (value >> 4) & 0x3;
206 status->sspp[SSPP_VIG0] = (value >> 4) & 0x1;
H A Ddpu_hw_mdss.h87 SSPP_VIG0,
107 SSPP_VIG0, enumerator in enum:dpu_sspp

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