Searched refs:SMC_SYSCON_RESET_CNTL (Results 1 - 12 of 12) sorted by relevance

/linux-master/drivers/gpu/drm/radeon/
H A Dsi_smc.c115 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
119 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
131 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
133 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
163 u32 rst = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
H A Dci_smc.c116 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
119 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
124 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
127 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
H A Dsid.h68 #define SMC_SYSCON_RESET_CNTL 0x80000000 macro
H A Dcikd.h72 #define SMC_SYSCON_RESET_CNTL 0x80000000 macro
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_smc.c113 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
117 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
129 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL) |
131 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
155 u32 rst = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c109 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
123 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
144 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
147 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
168 SMC_SYSCON_RESET_CNTL,
182 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
H A Dfiji_smumgr.c108 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
123 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
174 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
189 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
H A Dpolaris10_smumgr.c209 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
223 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
244 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
247 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
268 SMC_SYSCON_RESET_CNTL,
282 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
H A Dtonga_smumgr.c103 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
119 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
169 SMC_SYSCON_RESET_CNTL, rst_reg, 1);
185 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
H A Diceland_smumgr.c112 SMC_SYSCON_RESET_CNTL, rst_reg, 0);
120 SMC_SYSCON_RESET_CNTL,
H A Dci_smumgr.c1903 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);
2364 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 1);
2944 SMC_SYSCON_RESET_CNTL,
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h69 #define SMC_SYSCON_RESET_CNTL 0x80000000 macro

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