Searched refs:SM (Results 1 - 25 of 74) sorted by relevance

123

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar9002/
H A Dar9285_diversity.c93 regVal |= SM(ant_div_control1, AR_PHY_9285_ANT_DIV_CTL);
98 regVal |= SM(ant_div_control2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
99 regVal |= SM((ant_div_control2 >> 2), AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
100 regVal |= SM((ant_div_control1 >> 1), AR_PHY_9285_ANT_DIV_ALT_GAINTB);
101 regVal |= SM((ant_div_control1 >> 2), AR_PHY_9285_ANT_DIV_MAIN_GAINTB);
107 regVal |= SM(HAL_ANT_DIV_COMB_LNA2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
108 regVal |= SM(HAL_ANT_DIV_COMB_LNA1, AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
109 regVal |= SM(AR_PHY_9285_ANT_DIV_GAINTB_0, AR_PHY_9285_ANT_DIV_ALT_GAINTB);
110 regVal |= SM(AR_PHY_9285_ANT_DIV_GAINTB_1, AR_PHY_9285_ANT_DIV_MAIN_GAINTB);
116 regVal |= SM(HAL_ANT_DIV_COMB_LNA
[all...]
H A Dar9285_btcoex.c115 regVal |= SM(ant_div_control1, AR_PHY_9285_ANT_DIV_CTL);
116 regVal |= SM(ant_div_control2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
117 regVal |= SM((ant_div_control2 >> 2), AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
118 regVal |= SM((ant_div_control1 >> 1), AR_PHY_9285_ANT_DIV_ALT_GAINTB);
119 regVal |= SM((ant_div_control1 >> 2), AR_PHY_9285_ANT_DIV_MAIN_GAINTB);
124 regVal |= SM((ant_div_control1 >> 3),
H A Dar9287_reset.c500 SM(pModal->iqCalICh[i],
502 SM(pModal->iqCalQCh[i],
532 SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF)
533 | SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAB_OFF)
534 | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAA_ON)
535 | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAB_ON));
552 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) |
553 SM(pModal->db2, AR9287_AN_RF2G3_DB2) |
554 SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) |
555 SM(pModa
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_aic.c453 ahp->ah_aic_sram[i] = (SM(aic_sram[i].sram.vga_dir_sign,
455 SM(aic_sram[i].sram.vga_quad_sign,
457 SM(aic_sram[i].sram.com_att_6db,
459 SM(aic_sram[i].sram.valid,
461 SM(aic_sram[i].sram.rot_dir_att_db,
463 SM(aic_sram[i].sram.rot_quad_att_db,
525 (SM(0, AR_PHY_AIC_MON_ENABLE) |
526 SM(40, AR_PHY_AIC_CAL_MAX_HOP_COUNT) |
527 SM(1, AR_PHY_AIC_CAL_MIN_VALID_COUNT) | //26
528 SM(3
[all...]
H A Dar9300_radar.c243 val |= SM(pe->pe_enabled, AR_PHY_RADAR_0_ENA);
248 val |= SM(pe->pe_firpwr, AR_PHY_RADAR_0_FIRPWR);
252 val |= SM(pe->pe_rrssi, AR_PHY_RADAR_0_RRSSI);
256 val |= SM(pe->pe_height, AR_PHY_RADAR_0_HEIGHT);
263 val |= SM(AR9300_DFS_PRSSI_CAC, AR_PHY_RADAR_0_PRSSI);
266 val |= SM(pe->pe_prssi, AR_PHY_RADAR_0_PRSSI);
269 val |= SM(pe->pe_prssi, AR_PHY_RADAR_0_PRSSI);
274 val |= SM(pe->pe_inband, AR_PHY_RADAR_0_INBAND);
282 val |= SM(pe->pe_maxlen, AR_PHY_RADAR_1_MAXLEN);
286 val |= SM(p
[all...]
H A Dar9300_xmit.c72 AR_TXCFG, (txcfg &~ AR_FTRIG) | SM(new_level, AR_FTRIG));
235 SM(ahp->ah_tx_ok_interrupt_mask, AR_IMR_S0_QCU_TXOK));
237 SM(ahp->ah_tx_err_interrupt_mask, AR_IMR_S1_QCU_TXERR)
238 | SM(ahp->ah_tx_eol_interrupt_mask, AR_IMR_S1_QCU_TXEOL));
327 OS_REG_WRITE(ah, AR_DLCL_IFS(q), SM(cw_min, AR_D_LCL_IFS_CWMIN)
328 | SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX)
329 | SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));
334 SM(INIT_SSH_RETRY, AR_D_RETRY_LIMIT_STA_SH) |
335 SM(INIT_SLG_RETRY, AR_D_RETRY_LIMIT_STA_LG) |
336 SM(q
[all...]
H A Dar9300_timer.c148 (SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_THRESH) |
149 SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_TRIG)));
168 (SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_THRESH) |
169 SM(AR_GENTMR_BIT(index), AR_IMR_S5_GENTIMER_TRIG)));
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8812a/
H A Dr12a_beacon.c73 txd->txdw1 = htole32(SM(R12A_TXDW1_QSEL, R12A_TXDW1_QSEL_BEACON));
74 txd->txdw1 |= htole32(SM(R12A_TXDW1_MACID, RTWN_MACID_BC));
77 txd->txdw3 |= htole32(SM(R12A_TXDW3_SEQ_SEL, id));
79 txd->txdw4 = htole32(SM(R12A_TXDW4_DATARATE, RTWN_RIDX_CCK1));
81 txd->txdw6 = htole32(SM(R21A_TXDW6_MBSSID, id));
91 txd->txdw4 = htole32(SM(R12A_TXDW4_DATARATE,
94 txd->txdw4 = htole32(SM(R12A_TXDW4_DATARATE, RTWN_RIDX_CCK1));
H A Dr12a_tx.c82 txd->txdw5 |= htole32(SM(R12A_TXDW5_DATA_BW,
84 txd->txdw5 |= htole32(SM(R12A_TXDW5_DATA_PRIM_CHAN,
115 txd->txdw4 |= htole32(SM(R12A_TXDW4_RTSRATE, ridx));
117 txd->txdw4 |= htole32(SM(R12A_TXDW4_RTSRATE_FB_LMT, 0xf));
197 txd->txdw1 |= htole32(SM(R12A_TXDW1_RAID, raid));
265 txd->txdw4 |= htole32(SM(R12A_TXDW4_RETRY_LMT,
277 txd->txdw2 |= htole32(SM(R12A_TXDW2_AMPDU_DEN,
279 txd->txdw3 |= htole32(SM(R12A_TXDW3_MAX_AGG,
318 txd->txdw1 |= htole32(SM(R12A_TXDW1_QSEL, qsel));
319 txd->txdw1 |= htole32(SM(R12A_TXDW1_MACI
[all...]
H A Dr12a_chan.c72 SM(R12A_TXAGC_CCK1, power[RTWN_RIDX_CCK1]) |
73 SM(R12A_TXAGC_CCK2, power[RTWN_RIDX_CCK2]) |
74 SM(R12A_TXAGC_CCK55, power[RTWN_RIDX_CCK55]) |
75 SM(R12A_TXAGC_CCK11, power[RTWN_RIDX_CCK11]));
80 SM(R12A_TXAGC_OFDM06, power[RTWN_RIDX_OFDM6]) |
81 SM(R12A_TXAGC_OFDM09, power[RTWN_RIDX_OFDM9]) |
82 SM(R12A_TXAGC_OFDM12, power[RTWN_RIDX_OFDM12]) |
83 SM(R12A_TXAGC_OFDM18, power[RTWN_RIDX_OFDM18]));
85 SM(R12A_TXAGC_OFDM24, power[RTWN_RIDX_OFDM24]) |
86 SM(R12A_TXAGC_OFDM3
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_xmit.c81 SM(10, AR_QUIET2_QUIET_DUR));
127 (SM((_series)[_index].Tries, AR_XmitDataTries##_index))
130 (SM((_series)[_index].Rate, AR_XmitRate##_index))
133 (SM((_series)[_index].PktDuration, AR_PacketDur##_index) |\
141 |SM((_series)[_index].ChSel, AR_ChainSel##_index)
375 ads->ds_ctl2 = SM(txTries0, AR_XmitDataTries0)
383 ads->ds_ctl7 = SM(ahp->ah_tx_chainmask, AR_ChainSel0)
384 | SM(ahp->ah_tx_chainmask, AR_ChainSel1)
385 | SM(ahp->ah_tx_chainmask, AR_ChainSel2)
386 | SM(ah
[all...]
H A Dar5416_btcoex.c68 SM(btconf->bt_time_extend, AR_BT_TIME_EXTEND) |
69 SM(btconf->bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
70 SM(btconf->bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
71 SM(btconf->bt_mode, AR_BT_MODE) |
72 SM(btconf->bt_quiet_collision, AR_BT_QUIET) |
73 SM(rxClearPolarity, AR_BT_RX_CLEAR_POLARITY) |
74 SM(btconf->bt_priority_time, AR_BT_PRIORITY_TIME) |
75 SM(btconf->bt_first_slot_time, AR_BT_FIRST_SLOT_TIME);
77 ahp->ah_btCoexMode2 |= SM(btconf->bt_hold_rxclear,
91 ahp->ah_btCoexMode |= SM(qnu
[all...]
H A Dar5416_spectral.c60 val |= SM(MAX_RADAR_RSSI_THRESH, AR_PHY_RADAR_0_RRSSI);
63 val |= SM(MAX_RADAR_HEIGHT, AR_PHY_RADAR_0_HEIGHT);
96 val |= SM(ss->ss_fft_period, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD);
101 val |= SM(ss->ss_period, AR_PHY_SPECTRAL_SCAN_PERIOD);
106 val |= SM(ss->ss_period, AR_PHY_SPECTRAL_SCAN_PERIOD);
113 val |= SM(ss->ss_count, AR_PHY_SPECTRAL_SCAN_COUNT);
130 val |= SM(ss->ss_count, AR_PHY_SPECTRAL_SCAN_COUNT_KIWI);
H A Dar5416_radar.c133 val |= SM(pe->pe_firpwr, AR_PHY_RADAR_0_FIRPWR);
137 val |= SM(pe->pe_rrssi, AR_PHY_RADAR_0_RRSSI);
141 val |= SM(pe->pe_height, AR_PHY_RADAR_0_HEIGHT);
145 val |= SM(pe->pe_prssi, AR_PHY_RADAR_0_PRSSI);
149 val |= SM(pe->pe_inband, AR_PHY_RADAR_0_INBAND);
180 val |= SM(pe->pe_relstep, AR_PHY_RADAR_1_RELSTEP_THRESH);
186 val |= SM(pe->pe_relpwr, AR_PHY_RADAR_1_RELPWR_THRESH);
207 val |= SM(pe->pe_maxlen, AR_PHY_RADAR_1_MAXLEN);
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8192c/
H A Dr92c_beacon.c64 SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) |
65 SM(R92C_TXDW1_RAID, R92C_RAID_11B));
69 txd->txdw4 |= htole32(SM(R92C_TXDW4_SEQ_SEL, id));
70 txd->txdw4 |= htole32(SM(R92C_TXDW4_PORT_ID, id));
71 txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, RTWN_RIDX_CCK1));
H A Dr92c_tx.c77 txd->txdw4 |= htole32(SM(R92C_TXDW4_DATA_SCO, extc_offset));
107 txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, ridx));
109 txd->txdw5 |= htole32(SM(R92C_TXDW5_RTSRATE_FB_LMT, 0xf));
168 txd->txdw1 |= htole32(SM(R92C_TXDW1_RAID, raid));
212 txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, id));
217 txd->txdw4 &= ~htole32(SM(R92C_TXDW4_RTSRATE, R92C_TXDW4_RTSRATE_M));
262 txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT,
275 txd->txdw2 |= htole32(SM(R92C_TXDW2_AMPDU_DEN,
277 txd->txdw6 |= htole32(SM(R92C_TXDW6_MAX_AGG,
317 txd->txdw1 |= htole32(SM(R92C_TXDW1_QSE
[all...]
H A Dr92c_chan.c185 SM(R92C_TXAGC_RATE06, power[RTWN_RIDX_OFDM6]) |
186 SM(R92C_TXAGC_RATE09, power[RTWN_RIDX_OFDM9]) |
187 SM(R92C_TXAGC_RATE12, power[RTWN_RIDX_OFDM12]) |
188 SM(R92C_TXAGC_RATE18, power[RTWN_RIDX_OFDM18]));
190 SM(R92C_TXAGC_RATE24, power[RTWN_RIDX_OFDM24]) |
191 SM(R92C_TXAGC_RATE36, power[RTWN_RIDX_OFDM36]) |
192 SM(R92C_TXAGC_RATE48, power[RTWN_RIDX_OFDM48]) |
193 SM(R92C_TXAGC_RATE54, power[RTWN_RIDX_OFDM54]));
196 SM(R92C_TXAGC_MCS00, power[RTWN_RIDX_HT_MCS(0)]) |
197 SM(R92C_TXAGC_MCS0
[all...]
H A Dr92c_llt.c60 SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) |
61 SM(R92C_LLT_INIT_ADDR, addr) |
62 SM(R92C_LLT_INIT_DATA, data));
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212_beacon.c188 | SM(bs->bs_intval, AR_BEACON_PERIOD)
189 | SM(bs->bs_timoffset ? bs->bs_timoffset + 4 : 0, AR_BEACON_TIM)
199 | SM(bs->bs_bmissthreshold, AR_RSSI_THR_BM_THR);
253 SM((nextdtim - SLEEP_SLOP) << 3, AR_SLEEP1_NEXT_DTIM)
254 | SM(CAB_TIMEOUT_VAL, AR_SLEEP1_CAB_TIMEOUT)
259 SM((nextTbtt - SLEEP_SLOP) << 3, AR_SLEEP2_NEXT_TIM)
260 | SM(BEACON_TIMEOUT_VAL, AR_SLEEP2_BEACON_TIMEOUT)
263 SM(beaconintval, AR_SLEEP3_TIM_PERIOD)
264 | SM(dtimperiod, AR_SLEEP3_DTIM_PERIOD)
H A Dar5212_xmit.c73 (txcfg &~ AR_FTRIG) | SM(newLevel, AR_FTRIG));
217 SM(ahp->ah_txOkInterruptMask, AR_IMR_S0_QCU_TXOK)
218 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC)
221 SM(ahp->ah_txErrInterruptMask, AR_IMR_S1_QCU_TXERR)
222 | SM(ahp->ah_txEolInterruptMask, AR_IMR_S1_QCU_TXEOL)
309 SM(cwMin, AR_D_LCL_IFS_CWMIN)
310 | SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX)
311 | SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));
315 SM(INIT_SSH_RETRY, AR_D_RETRY_LIMIT_STA_SH)
316 | SM(INIT_SLG_RETR
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8188e/
H A Dr88e_rf.c57 SM(R88E_LSSI_PARAM_ADDR, addr) |
58 SM(R92C_LSSI_PARAM_DATA, val));
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8812a/usb/
H A Dr12au_init.c76 const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3);
81 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB2));
85 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB1));
92 const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3);
99 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB3));
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5210/
H A Dar5210_beacon.c160 | SM(bs->bs_intval, AR_BEACON_PERIOD)
161 | SM(bs->bs_timoffset ? bs->bs_timoffset + 4 : 0, AR_BEACON_TIM)
199 | SM(bs->bs_bmissthreshold > BMISS_MAX ?
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211_beacon.c165 | SM(bs->bs_intval, AR_BEACON_PERIOD)
166 | SM(bs->bs_timoffset ? bs->bs_timoffset + 4 : 0, AR_BEACON_TIM)
176 | SM(bs->bs_bmissthreshold, AR_RSSI_THR_BM_THR);
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8192e/
H A Dr92e_rf.c86 SM(R88E_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));

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