Searched refs:SKL_DPLL_STATUS (Results 1 - 2 of 2) sorted by relevance

/haiku/src/add-ons/accelerants/intel_extreme/
H A DPipes.cpp595 if (read32(SKL_DPLL_STATUS) & (1 << (*pllSel * 8))) {
610 TRACE("Skylake DPLL_STATUS: 0x%" B_PRIx32 "\n", read32(SKL_DPLL_STATUS));
/haiku/headers/private/graphics/intel_extreme/
H A Dintel_extreme.h903 #define SKL_DPLL_STATUS (0xc060 | REGS_NORTH_PIPE_AND_PORT) macro

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