intel_extreme: for DDI, map the ddc pin to the GPIO

add port G for Gen12

Change-Id: I70bba2d6d2ec0fbad8bdbec14412ea982690d563
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5626
Reviewed-by: Adrien Destugues <pulkomandy@pulkomandy.tk>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>

intel_extreme: check another register when finding out hw_cdclk on Haswell/Broadwell

doesn't help with #18084

Change-Id: I6f3cc8b50fc5742fab3021f01b90dfebe484b336
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5830
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

intel_extreme: also set hw_cdclk on Broadwell

this needed for dp aux before skylake, only for DP A (eDP).
should help with #17771

Change-Id: I4bdcca1fdc05294fb5b56c5c96164b6936a5881e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5355
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: switch FDI to i915 register naming

Change-Id: Ib7382240a2bc07dbbd2aed7647b06f14a6c5cb4c
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5335
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_extreme: check internal crt feature in VBT for analog probe on DDI

* also uses the BAR size when dumping regs (as done by the intel_reg tool).

Change-Id: Ie29768afc8f9c42bb9a03b2866db34c4b0e43b7d
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5334
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

intel_extreme: improve DpAux support on HSW/SNB/IVB

hraw_clock is possibly dynamic, but for the usecase this seems good enough.
Tested on SandyBridge and Haswell laptops.

Change-Id: I045b3c03f6b37bbffb3d8688658ffaa2a97311ae
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5319
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_extreme: leverage VBT device type for internal panel

* also handle dp aux on PCH.
* tested on Gen7, should work from Gen6.

Change-Id: I8d99bcdc10c817e66441a6a644df490dd988a74d
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5290
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_extreme: irq hotplug support for IceLake and newer PCH.

we enable every port interrupt instead of relying on the ports found in the VBT.
ATM only log the plug state when it changes.

Change-Id: I5175fb137d11f0114beb2915a4f363341cfe8e36
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5287
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_extreme: parse VBT device configs, use this to skip unused ports

* BDB version from 111
* for DDI from Gen9
* for HDMI and DisplayPort from Gen6
* use the first port to create the mode list
* also probe DDI Port A
* the aux channel helps to select the correct dp aux registers.

Change-Id: I80549a6ec0477bed768cc5f388959b606d50c1b7
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5286
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_extreme: adjust PCH definitions for ADP and ICP

Change-Id: I2c2682e7e99e61a48b00155b4e60a457a8862117
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5215
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: set/get brightness in legacy mode for gen2,i915GM,i945GM

untested, see #15448

Change-Id: Iaf0cdacd39ebadfc143b072bdd6f5435a1394f45
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5222
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: add IDs for Comet Lake

untested, similar to Kaby Lake.
pending bug report from scott_puopolo18

Change-Id: I9dad02a5f39683687de943f950dc3c1a493622a1
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5216
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: brightness setting support for Kaby Lake

Change-Id: Ie78a034077f3be8faaaf83ab80a0ae6c1c001bc0
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5187
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

intel_extreme: hook dp_aux channel to the i2c common ddc for DigitalDisplayInterface ports

This assumes a Gen9 or Gen11 configuration, and aux channel 0. As a result, the same EDID will
be found for every DDI port. The mapping should be found in the VBT.

Tested on KabyLake and JasperLake

Change-Id: I27f5ac8ec8e6ba519fbe9aaf745e78a7361175b9
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5175
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: rework interrupt handler for gen8 til gen11

minimize register reads/writes.
makes more interrupt handling easier to add, for instance iir interrupts.

Change-Id: I97a7e9fcc9273ada6c0f12d5343bf7804f8bdd20
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5174
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: improve brightness setting support

- Newer devices use a different layout for the backlight PWM registers
- Get the min brightness level from the BDB

Change-Id: I99745a022dd38733a4c2386f91c4c57016dd2acd
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5162
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

intel_extreme: Commit missing definition of INTEL_MODEL_BDWS.

intel_extreme: use proper generation for Tiger Lake devices

The CPU in these is generation 11, but the graphics unit is actually
generation 12. Thanks to KapiX for pointing this out!

intel_extreme: add PCI ID for Tiger Lake

Internal display on my laptop isn't detected yet so modesetting doesn't
work, but at least I get vblank interrupts and backlight control.

Fixes #17569

Change-Id: I86dd56bc3fc2c288688242e34d9220028036ab74
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5156
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: setup Gen11 interrupts

added register names from i915 as that's what the register dump tool uses.

Change-Id: I4c4db881f55ffa820c0a6a058a533328a0b5d68f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5161
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

intel_extreme: add IDs for Jasper Lake

tested with Acer Swift SF114-34

intel_extreme: added more pipeC support, fixes for eDP on DDI systems

intel_extreme: log srcclk info, Sandy/Ivy eDP detect BIOS pipe setup and use that.

intel_extreme: Sandy/IvyBridge fix 4 lanes DP detect, fully pgm eDP link

intel_extreme: decoupled PIPE/eDP link programming from FDI train, fixed eDP pgm error.

intel_extreme: for Ivy/SandyBridge added eDP programming for laptops.

intel_extreme: sandy/ivybridge DP links to screens are now programmed to the actual mode if possible

intel_extreme: vblank interrupt support for Gen8+

Change-Id: I8e7e68786cc4a626cb386929600715a6a6b1917d
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4760
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Axel Dörfler <axeld@pinc-software.de>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

intel_extreme: add PCH definitions for some platforms

Change-Id: Id91f8fb526825cc62cd4288bee4a6d08dfd6654a
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4764
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_extreme:DP links on sky- upto/incl coffeelake are now done (refclk detection added)

intel_extreme: PLLs post skylake work differently again. Refclk update.

intel_extreme: for gen9.5 added new portF to DDI scan. add ID dump in kerneldriver.

intel_extreme: added DDI link colordepth detection, may fix ticket #17439

intel_extreme: enable KabyLake

Change-Id: I81d04fdf8305efcc9250cfb975dd3466ebcb4058
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4740
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_extreme: enable CoffeeLake

Change-Id: Id73c88d0815259fa7a8027f757ac430818492b1e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4739
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

intel_gart: add support for Gen8+ GPUs

Change-Id: I8b84e278f33542c359fc0d783f571e06ebc89b2a
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4737
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Rudolf Cornelissen <rudhaiku@gmail.com>

intel_extreme: enabled all known skylake gfx cards since they are pgm'd now

intel_extreme: skylake PLL works, all outputs fully functional.

intel_extreme: add haswell/skylake PLL calcs, no functional change yet.

intel_extreme: skylake/DDI. all displays can set resolution now, no refresh on digital panels yet (DPLL still missing)

intel_extreme: skylake/DDI improvements. no resolution changing possible yet (missing DPLL code yet)

intel_extreme: haswell and skylake DDI EDID support added, modesetting not finished yet.

intel_extreme: reduce use of display_mode where display_timing is enough

In most cases we don't need to use the complete display_mode struct and
we just need the timings. This will avoid future confusion between the
virtual width/height and the actual display timings, if we implement
scrolling someday.

Change-Id: I6c4430b84130b956a47ea0a01afb0843f5a34fd2
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4665
Reviewed-by: waddlesplash <waddlesplash@gmail.com>

intel extreme: skylake sets color, base and address, no resolution and refresh yet

intel_extreme: set B_SCROLL, share current mode. Cloning and BWindowScreen now work OK.

intel_extreme: fix haswell virt display scroll/pan, ticket #17261

intel_extreme: gen4 displayport now sets modes, dualhead clone works.

intel_extreme: displayport now scales to BIOS set mode.

intel_extreme: haswell+ has DDI, no DP, so block scanning that for screens.

intel_extreme: don't pgm pipes, follow BIOS for now. Two screens on now i.e.

intel driver: added panelfitter pgmming.

Intel_extreme: fixed hrev55115 regression and added FDI data/link M/N programming.

Intel_extreme: fixed DPLL pgming (Sandy+), prevent black display by not killing PIPE (Ivy+). Chkd GMA(Q33G/Q45) OK. Added defines.

intel_extreme: some minor fixes

- Cleanup HEAD_MODE constants. These should be completely removed, now
that we have a proper notion of pipes and displays. But the DPMS code
still uses them, for now.
- Fix the ie_pipe command where width and height were swapped and
missing a +1 to show the actual videomode values

intel_extreme: program the DPLL_SEL register on SandyBridge

We need to assign PLLs to pipes and transcoders. The assignments on
previous generations were fixed, but now it's up to us to set it up.

Do the simplest thing for now: assign PLL1 to pipe A and PLL2 to pipe B.

intel_extreme: remove unhandled generation defines

- 7xx (1st gen) has no driver in Haiku or is handled by the intel_810 driver
- PowerVR has no driver in Haiku

So there is no point in having those in the intel_extreme driver.

While I'm at it, fix the video timing/resolution constraints for
sanitize_video_mode.

intel_extreme: do not reprogram transcoded/output mapping on ibex point

Another try to fix #15628

intel_extreme: fix pipe and plane size registers

- The name for the registers were swapped
- The width and height were also swapped in one of them
- Remove some old #if 0 code that touched these registers but has been
disabled for a while.

intel_extreme: use the panel fitter for generation 4 devices

LVDS panels must really be driven at their native resolution, otherwise
they will simply not work. This means we should basically never touch
the video timings on that side. We need to only set the source size in
the pipe configuration, and let the panel fitter figure out the scaling.

On my G45 laptop, this allows me to use non-native resolutions on the
laptop display. This also means when booting with a VGA display
connected, I do get a valid display on the internal panel (using the VGA
resolution). VGA still gets "out of range", so we're still not setting
up something there.

If I switch to VGA display in the BIOS, I get a working picture there
and garbage on the internal display, which is progress (before I would
get a black screen on the internal display)

Fixes #12723.

intel_extreme: Update PCH mask to match new bits

* Missed in 87628f17eb

intel_extreme: Add additional more recent PCH devices

Change-Id: Ib9f7dc187300c9f746bca9fd7f721c1954f5be44

Revert "intel_extreme: Broadwell is really Gen7(.5), not 8."

This reverts commit 4f059c1fc51d17a2a592c5675a2f188b4bea2f69.

From discussion on the mailing list, it seems I was correct the first time
and Broadwell is Gen8. The confusion comes from the SER5/SOC distinction,
which is not in the Linux driver, and I still don't know which one it really
belongs in.

intel_extreme: Broadwell is really Gen7(.5), not 8.

intel_extreme: backlight control on pre-PCH devices

Thanks to oco for letting me test this on his old laptop.

intel_extreme: Beginnings of Broadwell support.

At present, does not work (it fails to properly set up interrupts,
resulting in thousands of unhandled ones which all but grinds the system
to a halt) but this at least is some progress.

Support for configuring screen backlight

Accelerant interface:
Introduce new hooks B_SET_BRIGHTNESS and B_GET_BRIGHTNESS. Brightness is
a float in the 0..1 range.

App_server:
Forward brightness things between BScreen and the accelerant.

intel_extreme:
Implement the hooks. Note that this only works for laptop panels, but
the driver will pretend to support it in other cases as well.

Screen preferences:
If the accelerant supports the B_GET_BRIGHTNESS hook, allow to set
brightness with a slider. Otherwise, the slidere is hidden and these
changes aren't visible.

intel_extreme: fix wait_for_vblank on SandyBridge

There was some mixup with the interrupt registers, still:
- The driver uses 16-bit read/write, but on SandyBridge the register is
32 bits
- There is a global interrupt enable bit, which must be set to unmask
everything else
- The bits for vblank interrupt are not the same on SNB and later PCH
based devices, and the code mixed the two.

Move the computation of the interrupt bits to an helper function, and
use it everywhere to make sure we always use the right bits.

More SandyBridge fixes and cleanups

Modesetting
===========

My previous hack was setting the transcoder registers, instead of the
display ones. Do that the way it is designed in the driver instead:

- If there is a transcoder, set its registers, but do not set the
display timings. The display will remain set at its native (and only)
resolution, and panel fitting will adjust the output of the transcoder
to match.
- If there is no transcoder, set the display registers directly to the
native resolution, as it was done on previous generation devices.
- fPipeOffset hacks no longer needed

DPMS
====

It seems the panel control register is not readable on PCH? Anyway, the
code would loop forever waiting for the bit to become unset when turning
the display off. Waiting seems to not be needed, so just remove it as
well as the "unlock" bit, which does not work for me and results in a
black screen.

Remaining hacks
===============

I still need to force HEAD_MODE_A_ANALOG to get output on pipe B (LVDS
display) working. I suspect something is common to the two pipes or not
allocated to the right one.

This version will have less side effects on other generations and help
with getting things to work on SandyBridge and possibly later devices.
Please test and report.

Fix SandyBridge support.

This reverts commit 4f2b258c32efeab97f043519b7f2d4e22819d431.
This reverts commit c86f3dba238a44a8fcf7b1452c46f1cab68f525a.
This reverts commit 61fbdb0667c57f6d3d11d33bce6c01bdd625aaec.
This reverts commit b3f14fb7c715cf95b374ee749dcafd5537d1b017.

intel_extreme: Implement Snb PCH FDI link training

intel_extreme: Implement Ilk PCH FDI link training

* IronLake tested and FDI says it trains successfully
* Still no LVDS video on Ilk

intel_extreme: Set FDI PLL RX lane count when enabling

intel_extreme: IronLake reference clock activation

intel_extreme: Improve PCH detection

* Detect PCH model based on ISA bridge and save
into shared info for later use.
* On CougarPoint PCH systems, assign pipes via
special CPT registers
* Drop HasPlatformControlHub as PCH should be
based on more than just generation.

intel_extreme: Extend DDI port probing to A-E

* The Linux code made this a bit hard to figure out via
complex define functions, however there can be up to
5 DDI ports (A-E)

intel_extreme: Add in some code for the lakes (unused)

intel_extreme: Add initial work for DDI ports

intel_extreme: Properly use VBIOS panel mode

* Move current_mode into the accelerant as the
driver doesn't care.
* Record panel_mode in driver and present to accelerant
* eDP, if no EDID and mobile, leave edid incomplete.
Mode set should notice that and fall back to panel_mode

intel_extreme: Clean up DisplayPort Port class

* DisplayPort != DigitalPort
* i2c needs wrapped in DP AUX transaction code
* Mode-setting comes with DP link training as well
* We need to try and share DP code with radeon_hd

intel_extreme: Prepare for DisplayPort AUX comms

intel_extreme: Add general pipe configuration and adjust color space

intel_extreme: Fix i965 LVDS panel programming

* polarity regs move on LVDS vs analog
* add knowledge or transcoder registers, they
exist seperately on PCH-split
* Native resolutions now work on LVDS under i965

intel_extreme: Correct panel control register on non-pch

intel_extreme: Rework PLL and id PineView as PIN

intel_extreme: More FDI training work

* IvyBridge or higher can auto-train.
* Linux doesn't use this feature, however
manual FDI link training is *really*
complex... lets try auto-training first.

intel_extreme: Enable / Disable FDI TX/RX

intel_extreme: First work at programming FDI

intel_extreme: Fix DP / HDMI gpu register location mixup on die

intel_extreme: Bump the VLV offset back a bit and fix port defines

intel_extreme: Program more LVDS regs. Set +/- @ lvds port

intel_extreme: Add initial TMDS modesetting code

intel_extreme: Correct DP port registers

intel_extreme: Set mode and pll via pipe-aware class functions

intel_extreme: Add pipe selection for ports

intel_extreme: Add some missing panel registers, masks, shifts

intel_extreme: Fix PCH_PANEL STS/CTL register location and define more

intel_extreme: Correct generations based on some Intel help

intel_gart: Clean up trace code, break apart gtt probe functions

intel_extreme: Fix IsMobile. That's not how masks work

intel_extreme: LVDS cleanup and fixes for later gens

intel_extreme: Add generation index + begin to use in gart

intel_gart: Fix gart detection and begin using DeviceType

* Correctly identify newly re-assigned cards families
* Begin using new DeviceType class in intel gart code

intel_extreme: Rework card identification defines

* Be more verbose on flag type
* Add additional groups
* Add additional families
* Correctly assign later models

intel_extreme: Clean up PLL reg defines

intel_extreme: Add pipe base register

intel_extreme: Start doing mode-setting at port level

* I really hope we can kill head_mode some day
* Break pll code out from mode code
* The LVDS and Digital are smooshed together and
likely need broken apart.

intel_extreme: Fix regs, remove PCH for VLV, Expand Type

* Fix some incorrect HDMI reg locations
* PCH goes away on later Intel chips
* Add more mask room for Intel Groups

intel_extreme: Correct card identification, add gen4 hdmi regs

intel_extreme: Rebase and refactor mmlr's work from 2013

* New port storage classes and cleaner logic

intel_extreme: Intial work for ValleyView support

* No impact to non-ValleyView chipsets
* Bump some register locations for VLV
* Only have HDMI port to test with on my ValleyView GPU
and our driver seems to be missing all HDMI and
sideband functionality.
* As ValleyView chipsets seem to be UEFI only, we don't
have VESA fallback, so this shouldn't cause regressions.
(unless we get UEFI framebuffer support)

intel_extreme: fix vblank interrupt on Ivy Bridge and later

Intel changed the PCH interrupt bits between Sandy Bridge and Ivy Bridge
to make space for the 3rd display pipe. Take this into account and check
for the correct bits on the newer devices.

Fixes #11522.

intel_extreme: fix warnings on 64bit.

intel_extreme: use VESA EDID info as fallback.

* Only in case retrieving EDID info failed on head A and C.
* Should help with detecting the native resolution for ticket #10878.

Intel_extreme: improve i855 support.

https://github.com/druga/haiku-stuff/tree/master/intel_extreme
Rebased against current sources.

* The BIOS video mode sometimes reports a scaled mode instead of the
physical panel dimensions. Get the data from the VBT table as well, and
use it if the reported resolution is bigger.
* On first boot, force the panel native mode so the user doesn't have to
set it manually.
* Only allow a single head at a time on i855gm, as the card can't drive
both heads at the same time.
* Detect when a new requested mode is the same as the current one, and
skip modesetting in that case. Avoids screen flickering when changing
workspaces.
* Fix some cases of misdetecting which pipes to enable

intel_extreme and radeon_hd: some 64 bit fixes

intel_extreme: Mark IvyBridge as having a PCH

* Modesetting now works on IvyBridge
* Preferred mode needs work though as my chipset
defaults to 1024x768 vs 1366x768

intel_extreme: Add IvyBridge PCIID's

* This needs testing and likely some IvyBridge
fixups

Fix wrong register values introduced in r42870.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42872 a95241bf-73f2-0310-859d-f6bbb57e9c96

Remove the interrupt register block. These aren't actually identitiy mapped
(they are actually reversed), so introduce a find_reg() inline function to map
such regs individually instead. Should fix interrupt storms on SandyBridge.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42870 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add a couple more SandyBridge IDs. They might work, but I can't test them.
* Also add the definitions and some specifics for IronLake (ILK), but keep the
IDs disabled as at least the one version I can test with doesn't work yet.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42869 a95241bf-73f2-0310-859d-f6bbb57e9c96

Make some more SandyBridge specifics into Platform Control Hub (PCH) specifics.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42868 a95241bf-73f2-0310-859d-f6bbb57e9c96

Style cleanups only, no functional change.
* Make the pointer style consistent accross all components, which should make it
easier when working all over the place.
* 80 char limits.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42863 a95241bf-73f2-0310-859d-f6bbb57e9c96

Fix register definition for image size registers. They are in the north pipe
control block. Doesn't matter on (G)MCH (they are the same register block tehre)
but fixes mode setting on PCH again.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42862 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Rework how registers are accessed. Most registers are now grouped into
register blocks and we encode their block into the register definition. On
register access these blocks are then translated into the final address.
* Set up the register blocks for (G)MCH and PCH variants.
* Remove most SandyBridge code that was actually PCH specific and is now taken
care of automatically.
* This will temporarily break SandyBridge support again until the right
transcoders are actually programmed.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42857 a95241bf-73f2-0310-859d-f6bbb57e9c96

Attempt at panel control for SandyBridge, still disabled though as it doesn't
work yet.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42856 a95241bf-73f2-0310-859d-f6bbb57e9c96

Group the PCH registers logically.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42852 a95241bf-73f2-0310-859d-f6bbb57e9c96

Add indexed color mode support for SandyBridge.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42851 a95241bf-73f2-0310-859d-f6bbb57e9c96

Some more SandyBridge specifics to get V-blank interrupts going.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42850 a95241bf-73f2-0310-859d-f6bbb57e9c96

More SandyBridge specifics: Use the proper registers for display detection and
DPMS. Still needs to be reworked...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42846 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add preliminary support for one SandyBridge mobile integrated graphics device
(the one in my new ThinkPad X1). The PLL is still off a bit so it has a few
blurry stripes, but EDID and mode setting basically works.
* Starting with IronLake the north/south bridge or (G)MCH/ICH setup was moved
into a platform control hub (PCH) which means that many registers previously
located in the GMCH are now in the PCH and have a new address.
* I'm committing this mostly because this way the additions are more easy to
follow. It is a bit messy and I'll clean it up more and possibly make it a
bit more generic. Also most of these changes actually apply to IronLake and up
and aren't SandyBridge specific, so a few of those additions will still get a
broader scope and new chips will be added.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42839 a95241bf-73f2-0310-859d-f6bbb57e9c96

Comparing with i915 DRM:
* add a INTEL_TYPE_915M type to be used by 0x2592 (mobile version)
* 0x2e32 is actually non mobile, added its brothers 0x2e02, 0x2e12, 0x2e22, 0x2e42, 0x2e92
* 0x27a2 is actually mobile.
* added 0x2972, 0x2982, 0x2992 for INTEL_TYPE_965 type, and 0x2a12 for INTEL_TYPE_965M.
* added corresponding entries in intel_gart.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40838 a95241bf-73f2-0310-859d-f6bbb57e9c96

* added support for the Atom IGD, based on the X driver sources (fixes #6202)
* fixes G4x PLL limits


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40319 a95241bf-73f2-0310-859d-f6bbb57e9c96

Enable the VBlank interrupt on pipe B for LVDS panels. This gets it working for me. Most stuff using BDirectWindowand synced drawing should now work better (\n and TVBack demos for example)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39655 a95241bf-73f2-0310-859d-f6bbb57e9c96

Always set the LVDS panel to its native mode, except for the 'display' part.
This allows to use lower resolution screen modes with black border.

Added a set of TODOs :
* The smaller scren is not centered, but aligned top-left
* The base resolution used is the one reported from edid 1.1, because I'm still not sure how to parse EDID 1.2. This resolution is too small on my laptop, but it works.

Also added two ways of setting 8-to-6 dithering for 18-bit LVDS panel. No visible result for me, unfortunately.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@38354 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now phys_addr_t should be used where needed.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37028 a95241bf-73f2-0310-859d-f6bbb57e9c96

forgot to add this file in r33815


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33821 a95241bf-73f2-0310-859d-f6bbb57e9c96

* added support for GM45 (might work for other chips in the G4 series)
* added header for dealing with binary numbers and bitmasks (C++ templates)
these "macro's" might not work well for long words, though


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33749 a95241bf-73f2-0310-859d-f6bbb57e9c96

* The save_lvds_mode() function did not correctly support the i965 chipset -
I've now removed that code, and factored out a retrieve_current_mode()
function that can work on head A and B.
* This fixes Adrien's flickering problem on his laptop - I can't find the
bug ticket, though. Hopefully it does not break other laptop chips. Testing
would be welcome, as I don't have any other machine here.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33633 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Changed the way the device type is tested/set. There shouldn't be any functional
changes.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32353 a95241bf-73f2-0310-859d-f6bbb57e9c96

Patch by Christopher Plymire, style-reworked by myself:
* first steps of supporting LVDS panels.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25975 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Overlay on the G33 does not work anymore in the secondary ring buffer;
we now always only use the primary ring buffer.
* Removed secondary ring buffer allocation and member fields.
* Increased size of the primary ring buffer to 65536 bytes.
* The bytes per row register is computed differently for 9xx chips.
* On G33, the overlay does not need a physical address anymore, so we
don't pass B_APERTURE_NEED_PHYSICAL to the allocation anymore for that
device.
* intel_free_memory() accidently added the aperture base to the allocation
and would therefore never free any memory.
* INTEL_RING_BUFFER_SIZE_MASK was shifted one bit to the right, didn't
cause any harm with our buffer sizes, yet, though.
* With these changes, the driver runs stable on a G33 chipset (I have not
yet tested the hardware cursor, though, it might need some work, too).
The only known issue left is that overlay flickers a bit if its buffer
is partially backed up by reserved and allocated memory.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23798 a95241bf-73f2-0310-859d-f6bbb57e9c96

Work in progress (might not work for you yet):
* Now uses the AGP GART module for memory management. This greatly simplifies
the memory handling, and memory is now actually allocated on demand,
instead of a fixed size (stolen memory is not freed, though).
* The Intel GART module should now also work with older chipsets.
* No longer remove the GTT size from the stolen memory; this appears to have
been a mistake in the X driver. Not sure about the BIOS popup yet.
* The AGP module (in combination with the Intel GART module) is now mandatory
to use the Intel driver.
* Removed now superfluous settings (like memory size). Only enabling/disabling
the hardware cursor is still supported.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23781 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Simplified usage of the INTEL_TYPE_xxx constants.
* Added some defines needed when playing with the bridge controller.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23753 a95241bf-73f2-0310-859d-f6bbb57e9c96

Some work in progress:
* set_gtt_entry() used the wrong index to fill the GTT - this could have never
worked correctly when you specified more memory than the amount of stolen
memory.
* Implementing maintaining resources for emulating overlay using the 3D engine
on i965. I don't yet commit the actual overlay code, as that is a) ugly, and
b) does not work yet.
* Moved AreaKeeper into its own header.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23709 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Added support for the G33 line of chips: mode setting and acceleration is working fine AFAICT.
* Implemented mapping the GTT area for i9xx chips other than the i965. This should also fix the
driver working with these chips at all.
* The memory used by the driver now take the GTT area into account - before the GTT could be
overwritten theoretically...
* Added fix for some i965 quirks from the X driver.
* Added some overlay definitions for the i965.
* Started support for G33 overlay (not complete yet).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23220 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Made QueueCommands::Write() and MakeSpace() public.
* Implemented MakeSpace() (not yet tested).
* Changed intel_wait_engine_idle() to spin() between reads and to timeout
after 1 second of waiting (could probably be done way earlier).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23120 a95241bf-73f2-0310-859d-f6bbb57e9c96

The intel_extreme driver now finally works with the i965 chipset;
acceleration works fine, but overlay doesn't - that's next on my list.
Turns out the i965 differentiates between RGB-32 and RGB-32-alpha, and
didn't like trying to use the latter as display mode (the i865 didn't
care at all)... finding that took me *way* too long, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22780 a95241bf-73f2-0310-859d-f6bbb57e9c96

Allocating additional memory should now work on the i965 as well (but bad things
will happen on earlier i9xx chips for now...). Not yet tested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22589 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Fixed PLL timing computation for the i9xx chips - I mixed post2 min/max values, and did
not take the VCO limits into account; both could (and would during testing) create invalid
frequencies.
* Also reverted the order in which the PLL divisors are traversed to match the order of what
is used in the X driver to create comparable output (our error computation is based on float,
though, and should therefore create more accurate values).
* The i965 introduced a special register for the surface; the former display base register
is now only used for the view offset. Instead of setting the base manually here and there,
there is now a set_frame_buffer_base() function.
* The DPMS code will now also turn off/on the PLL clock generator.
* The code needs some more cleanup, and while the driver now produces the correct timing on
my i965 system, I'm now greeted by a black screen after startup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22289 a95241bf-73f2-0310-859d-f6bbb57e9c96

Implemented I2C support to get the DDC EDID info from the monitor - it's working as is, but
nothing is done with the data yet (besides dumping them to the serial output).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22272 a95241bf-73f2-0310-859d-f6bbb57e9c96

Forgot to commit the header...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22255 a95241bf-73f2-0310-859d-f6bbb57e9c96

* The second open will now fail, too, in case the hardware could not be initialized
correctly.
* Got rid of this superfluous cookie stuff - either the VFS behaves correctly, or
we're screwed anyway.
* Made adding debugger commands optional depending on if DEBUG_COMMANDS is defined
or not.
* Minor other cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@21322 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Work in progress to support the i965 chipset as well; still works on i865, but
doesn't work on i965 yet.
* B_GET_DISPLAY_MODE now returns the mode actually configured in the chip instead
of the last mode set; while this isn't really necessary, it allows to check what
mode was used during startup.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@21321 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Obviously, the i9xx family has changed the order of the PCI mappings, so we need
to take that into account.
* Introduced INTEL_TYPE_FAMILY_MASK and INTEL_TYPE_GROUP_MASK to better
differentiate the device type.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@18293 a95241bf-73f2-0310-859d-f6bbb57e9c96

* B_MOVE_DISPLAY and B_SET_INDEXED_COLORS should now work for the digital
output as well.
* Obviously got the register for INTEL_DISPLAY_B_DIGITAL_PORT wrong - it's
not 0x61000 but 0x61140, maybe that can explain the fun we had at BeGeistert :)
* Renamed the analog display registers to better fit the digital ones, ie.
replaced DISPLAY with DISPLAY_A - although this might be not really correct
as it seems that the pipes can be selected arbitrarily.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17566 a95241bf-73f2-0310-859d-f6bbb57e9c96

Some work to support output on the digital interface like laptop panels.
Need to clean this up, though. It even sort of worked on tic's IBM X40
on BeGeistert - if you weren't irritated by the fact some parts of the
screen were just black, that is :-)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17565 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Added i830 as supported chipset - doesn't work perfectly, though. But Kyan reports
that at least 8 bit modes seems to work (but overlay only partially)
* Added "hardware_cursor" option to the settings file - when set to "false", you should
have a cursor in the second output now as well.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17498 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now disables the VGA display mode explicetly, which allows it to work
without having a VESA mode set first (thanks to Stephan for noticing
this).
* intel_set_display_mode() now calls intel_propose_display_mode() to make
sure the mode passed in is valid. Note, B_PROPOSE_DISPLAY_MODE is still
not working correctly (which will cause problems for BWindowScreen and
friends).
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17460 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Made the accelerant safer to use when cloned (though I didn't test cloning yet);
introduced a lock that is used in B_SET_DISPLAY_MODE etc.
* Correctly implemented B_ACQUIRE_ENGINE and B_RELEASE_ENGINE now (ie. they lock
the engine now).
* The lock of the ring buffers is now deleted when the (primary) accelerant is closed.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17453 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Moved the intel_info structure and prototypes from intel_extreme.cpp from the shared
headers into intel_extreme_private.h.
* Removed non-memory-mapped definitions from driver.h.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17452 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Implemented hardware cursor support.
* Turns out cursor handling is simpler as originally thought, so I could remove its
physical mapping - it's still put into the shared area, though, although that isn't
needed for this chip (but could eventually simplify the handling of other generations
of this chip).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17450 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Accidently overwrote info.registers which let all subsequent register writes
(in the kernel driver) fail - or crash the system.
* Waiting for VBLANK now works as expected - you actually have to *set* the bit
to clear it, isn't that obvious? :-)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17443 a95241bf-73f2-0310-859d-f6bbb57e9c96

Implemented vblank interrupt and support for the retrace semaphore - not yet
tested, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17439 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Prepared having hardware cursor support; got quite complicated because there
is no good (or reliable) way to retrieve the physical address of "stolen"
(by the BIOS) graphics memory.
* Implemented allocation of additional graphics memory in case the BIOS was
a bit too cheap. We now guarantee 8 MB of memory available to the graphics
chip - would be nicer to only allocate that on demand, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17433 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Implemented B_FILL_SPAN - I am not sure if it's used at all, though, so
I am also not sure if it's working correctly.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17425 a95241bf-73f2-0310-859d-f6bbb57e9c96

Say hello to B_FILL_RECTANGLE and B_INVERT_RECTANGLE - only B_FILL_SPAN is missing
from the acceleration hooks in BeOS.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17424 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Turns out the virtual messes with the data in struct command, so we can't
use it (which isn't really that bad).
* B_SCREEN_TO_SCREEN_BLIT is now working as intended, so we can finally move
windows and scroll at decent speed :-)
* Implemented a simple version of B_WAIT_ENGINE_IDLE for now.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17422 a95241bf-73f2-0310-859d-f6bbb57e9c96

Started implementing screen-to-screen blits, not yet tested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17416 a95241bf-73f2-0310-859d-f6bbb57e9c96

* The Y/RGB and UV registers for the integer downscale factor are reverse to
the usual order of other registers, so I mixed it up: vertical downscaling
is now working as expected as well.
* The downscaling factor was a tiny bit too low (one pixel from the view).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17414 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now allocates space for the hardware status page and cursor memory, not yet
used, though.
* Renamed the PhyisicalPageMapper class to AreaKeeper and made it a bit more
generic (ie. it can now also create usual areas)
* The shared_info is now created using the AreaKeeper, too, and this actually
fixes some potential memory leaks.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17412 a95241bf-73f2-0310-859d-f6bbb57e9c96

We're now using a secondary (high priority) ring buffer for hardware
overlay - this will improve the overlay performance when the engine is
under load (the acceleration engine will use the primary lower priority
ring buffer).



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17411 a95241bf-73f2-0310-859d-f6bbb57e9c96

The size of the stolen memory for the graphics chip is now read out of the host bridge.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17381 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Turns out you must not set the source width/height UV registers (for planar
mode), but you have to set the scaling UV registers in order to have correct
overlay.
* In other words, overlay is working now! There are still issues with it, which
can probably be attributed to missing bounds checks (the screen goes black
when you leave full-screen mode in VLC - but not if overlay just stops).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17365 a95241bf-73f2-0310-859d-f6bbb57e9c96

B_SET_INDEXED_COLORS is now working correctly for B_CMAP8, IOW you can now use
8 bit modes with this driver as well.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17339 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Finally the overlay looks like an overlay. It took me almost a day to realize that
the Intel chip obviously cannot do overlays in B_RGB16 - even though it pretends
to be able to do that.
* B_YCbCr422 seems to work, though, I haven't tested any other spaces for now, and
I somewhat doubt they will work. It's all green, though, and the scaling doesn't
seem to be correct - that we be solvable, though :)
* There aren't any bounds checks (so don't move the window out of the screen), and
also the overlay_view offsets are ignored.
* Scaling and moving is now detected, and there is always as little work done as
possible to reduce the workload on buffer switches (the most common case).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17315 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Doh, I had done all bitfields in the wrong direction (msb to lsb, but it's actually
lsb to msb).
* The result is that there is now *something* to see when overlay is turned on. In
fact the whole screen goes dark besides a few pixels on the top - now isn't that
something? :-)
* The overlay is also turned off again correctly - which also revealed a bug in our
app_server: B_CONFIGURE_OVERLAY is not always called with window=NULL/view=NULL
to turn off overlay (might be an incorrect handling of BView::ClearOverlay()).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17300 a95241bf-73f2-0310-859d-f6bbb57e9c96

Enabling overlay requires a command ring buffer, and we're setting one (very
small) up for this specific task - this will later be used for the acceleration
engine as well.
Some more work on overlay initialization, doesn't do anything yet, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17254 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Added overlay register definitions.
* The overlay register update buffer is now created and exported, ready
to be used.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17244 a95241bf-73f2-0310-859d-f6bbb57e9c96

Implemented overlay management. The hardware doesn't notice them yet, though :)
(but the app_server thinks they're working).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17242 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now using Thomas memory manager to manage the graphics memory; allocation
of graphics memory is now possible.
* Changed driver name to start with "intel_extreme" to have a nicer device
name.
* Renamed frame_buffer* stuff to graphics_memory* as the frame buffer just
happens to be located somewhere in the graphics memory.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17224 a95241bf-73f2-0310-859d-f6bbb57e9c96

* init_driver() now behaves better in low memory situations.
* Some preparations to support more than one chipset, added i855G (device ID 0x3582)
to test with - the accelerant_device_info is now filled with that additional data
as well.
* Some minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16982 a95241bf-73f2-0310-859d-f6bbb57e9c96

Very basic driver for the "Intel Extreme Graphics 2" chips, only supports i865G for now.
Only mode switches do work, doesn't yet make sure the mode is valid, though.
At this point, this driver only works on Haiku, the R5 app_server is crashing for some
reason I need to investigate some day (maybe tomorrow :)).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16872 a95241bf-73f2-0310-859d-f6bbb57e9c96

intel_extreme: fix vblank interrupt on Ivy Bridge and later

Intel changed the PCH interrupt bits between Sandy Bridge and Ivy Bridge
to make space for the 3rd display pipe. Take this into account and check
for the correct bits on the newer devices.

Fixes #11522.

intel_extreme: fix warnings on 64bit.

intel_extreme: use VESA EDID info as fallback.

* Only in case retrieving EDID info failed on head A and C.
* Should help with detecting the native resolution for ticket #10878.

Intel_extreme: improve i855 support.

https://github.com/druga/haiku-stuff/tree/master/intel_extreme
Rebased against current sources.

* The BIOS video mode sometimes reports a scaled mode instead of the
physical panel dimensions. Get the data from the VBT table as well, and
use it if the reported resolution is bigger.
* On first boot, force the panel native mode so the user doesn't have to
set it manually.
* Only allow a single head at a time on i855gm, as the card can't drive
both heads at the same time.
* Detect when a new requested mode is the same as the current one, and
skip modesetting in that case. Avoids screen flickering when changing
workspaces.
* Fix some cases of misdetecting which pipes to enable

intel_extreme and radeon_hd: some 64 bit fixes

intel_extreme: Mark IvyBridge as having a PCH

* Modesetting now works on IvyBridge
* Preferred mode needs work though as my chipset
defaults to 1024x768 vs 1366x768

intel_extreme: Add IvyBridge PCIID's

* This needs testing and likely some IvyBridge
fixups

Fix wrong register values introduced in r42870.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42872 a95241bf-73f2-0310-859d-f6bbb57e9c96

Remove the interrupt register block. These aren't actually identitiy mapped
(they are actually reversed), so introduce a find_reg() inline function to map
such regs individually instead. Should fix interrupt storms on SandyBridge.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42870 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add a couple more SandyBridge IDs. They might work, but I can't test them.
* Also add the definitions and some specifics for IronLake (ILK), but keep the
IDs disabled as at least the one version I can test with doesn't work yet.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42869 a95241bf-73f2-0310-859d-f6bbb57e9c96

Make some more SandyBridge specifics into Platform Control Hub (PCH) specifics.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42868 a95241bf-73f2-0310-859d-f6bbb57e9c96

Style cleanups only, no functional change.
* Make the pointer style consistent accross all components, which should make it
easier when working all over the place.
* 80 char limits.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42863 a95241bf-73f2-0310-859d-f6bbb57e9c96

Fix register definition for image size registers. They are in the north pipe
control block. Doesn't matter on (G)MCH (they are the same register block tehre)
but fixes mode setting on PCH again.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42862 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Rework how registers are accessed. Most registers are now grouped into
register blocks and we encode their block into the register definition. On
register access these blocks are then translated into the final address.
* Set up the register blocks for (G)MCH and PCH variants.
* Remove most SandyBridge code that was actually PCH specific and is now taken
care of automatically.
* This will temporarily break SandyBridge support again until the right
transcoders are actually programmed.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42857 a95241bf-73f2-0310-859d-f6bbb57e9c96

Attempt at panel control for SandyBridge, still disabled though as it doesn't
work yet.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42856 a95241bf-73f2-0310-859d-f6bbb57e9c96

Group the PCH registers logically.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42852 a95241bf-73f2-0310-859d-f6bbb57e9c96

Add indexed color mode support for SandyBridge.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42851 a95241bf-73f2-0310-859d-f6bbb57e9c96

Some more SandyBridge specifics to get V-blank interrupts going.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42850 a95241bf-73f2-0310-859d-f6bbb57e9c96

More SandyBridge specifics: Use the proper registers for display detection and
DPMS. Still needs to be reworked...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42846 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add preliminary support for one SandyBridge mobile integrated graphics device
(the one in my new ThinkPad X1). The PLL is still off a bit so it has a few
blurry stripes, but EDID and mode setting basically works.
* Starting with IronLake the north/south bridge or (G)MCH/ICH setup was moved
into a platform control hub (PCH) which means that many registers previously
located in the GMCH are now in the PCH and have a new address.
* I'm committing this mostly because this way the additions are more easy to
follow. It is a bit messy and I'll clean it up more and possibly make it a
bit more generic. Also most of these changes actually apply to IronLake and up
and aren't SandyBridge specific, so a few of those additions will still get a
broader scope and new chips will be added.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42839 a95241bf-73f2-0310-859d-f6bbb57e9c96

Comparing with i915 DRM:
* add a INTEL_TYPE_915M type to be used by 0x2592 (mobile version)
* 0x2e32 is actually non mobile, added its brothers 0x2e02, 0x2e12, 0x2e22, 0x2e42, 0x2e92
* 0x27a2 is actually mobile.
* added 0x2972, 0x2982, 0x2992 for INTEL_TYPE_965 type, and 0x2a12 for INTEL_TYPE_965M.
* added corresponding entries in intel_gart.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40838 a95241bf-73f2-0310-859d-f6bbb57e9c96

* added support for the Atom IGD, based on the X driver sources (fixes #6202)
* fixes G4x PLL limits


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40319 a95241bf-73f2-0310-859d-f6bbb57e9c96

Enable the VBlank interrupt on pipe B for LVDS panels. This gets it working for me. Most stuff using BDirectWindowand synced drawing should now work better (\n and TVBack demos for example)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39655 a95241bf-73f2-0310-859d-f6bbb57e9c96

Always set the LVDS panel to its native mode, except for the 'display' part.
This allows to use lower resolution screen modes with black border.

Added a set of TODOs :
* The smaller scren is not centered, but aligned top-left
* The base resolution used is the one reported from edid 1.1, because I'm still not sure how to parse EDID 1.2. This resolution is too small on my laptop, but it works.

Also added two ways of setting 8-to-6 dithering for 18-bit LVDS panel. No visible result for me, unfortunately.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@38354 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now phys_addr_t should be used where needed.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37028 a95241bf-73f2-0310-859d-f6bbb57e9c96

forgot to add this file in r33815


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33821 a95241bf-73f2-0310-859d-f6bbb57e9c96

* added support for GM45 (might work for other chips in the G4 series)
* added header for dealing with binary numbers and bitmasks (C++ templates)
these "macro's" might not work well for long words, though


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33749 a95241bf-73f2-0310-859d-f6bbb57e9c96

* The save_lvds_mode() function did not correctly support the i965 chipset -
I've now removed that code, and factored out a retrieve_current_mode()
function that can work on head A and B.
* This fixes Adrien's flickering problem on his laptop - I can't find the
bug ticket, though. Hopefully it does not break other laptop chips. Testing
would be welcome, as I don't have any other machine here.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33633 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Changed the way the device type is tested/set. There shouldn't be any functional
changes.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32353 a95241bf-73f2-0310-859d-f6bbb57e9c96

Patch by Christopher Plymire, style-reworked by myself:
* first steps of supporting LVDS panels.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25975 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Overlay on the G33 does not work anymore in the secondary ring buffer;
we now always only use the primary ring buffer.
* Removed secondary ring buffer allocation and member fields.
* Increased size of the primary ring buffer to 65536 bytes.
* The bytes per row register is computed differently for 9xx chips.
* On G33, the overlay does not need a physical address anymore, so we
don't pass B_APERTURE_NEED_PHYSICAL to the allocation anymore for that
device.
* intel_free_memory() accidently added the aperture base to the allocation
and would therefore never free any memory.
* INTEL_RING_BUFFER_SIZE_MASK was shifted one bit to the right, didn't
cause any harm with our buffer sizes, yet, though.
* With these changes, the driver runs stable on a G33 chipset (I have not
yet tested the hardware cursor, though, it might need some work, too).
The only known issue left is that overlay flickers a bit if its buffer
is partially backed up by reserved and allocated memory.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23798 a95241bf-73f2-0310-859d-f6bbb57e9c96

Work in progress (might not work for you yet):
* Now uses the AGP GART module for memory management. This greatly simplifies
the memory handling, and memory is now actually allocated on demand,
instead of a fixed size (stolen memory is not freed, though).
* The Intel GART module should now also work with older chipsets.
* No longer remove the GTT size from the stolen memory; this appears to have
been a mistake in the X driver. Not sure about the BIOS popup yet.
* The AGP module (in combination with the Intel GART module) is now mandatory
to use the Intel driver.
* Removed now superfluous settings (like memory size). Only enabling/disabling
the hardware cursor is still supported.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23781 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Simplified usage of the INTEL_TYPE_xxx constants.
* Added some defines needed when playing with the bridge controller.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23753 a95241bf-73f2-0310-859d-f6bbb57e9c96

Some work in progress:
* set_gtt_entry() used the wrong index to fill the GTT - this could have never
worked correctly when you specified more memory than the amount of stolen
memory.
* Implementing maintaining resources for emulating overlay using the 3D engine
on i965. I don't yet commit the actual overlay code, as that is a) ugly, and
b) does not work yet.
* Moved AreaKeeper into its own header.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23709 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Added support for the G33 line of chips: mode setting and acceleration is working fine AFAICT.
* Implemented mapping the GTT area for i9xx chips other than the i965. This should also fix the
driver working with these chips at all.
* The memory used by the driver now take the GTT area into account - before the GTT could be
overwritten theoretically...
* Added fix for some i965 quirks from the X driver.
* Added some overlay definitions for the i965.
* Started support for G33 overlay (not complete yet).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23220 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Made QueueCommands::Write() and MakeSpace() public.
* Implemented MakeSpace() (not yet tested).
* Changed intel_wait_engine_idle() to spin() between reads and to timeout
after 1 second of waiting (could probably be done way earlier).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23120 a95241bf-73f2-0310-859d-f6bbb57e9c96

The intel_extreme driver now finally works with the i965 chipset;
acceleration works fine, but overlay doesn't - that's next on my list.
Turns out the i965 differentiates between RGB-32 and RGB-32-alpha, and
didn't like trying to use the latter as display mode (the i865 didn't
care at all)... finding that took me *way* too long, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22780 a95241bf-73f2-0310-859d-f6bbb57e9c96

Allocating additional memory should now work on the i965 as well (but bad things
will happen on earlier i9xx chips for now...). Not yet tested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22589 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Fixed PLL timing computation for the i9xx chips - I mixed post2 min/max values, and did
not take the VCO limits into account; both could (and would during testing) create invalid
frequencies.
* Also reverted the order in which the PLL divisors are traversed to match the order of what
is used in the X driver to create comparable output (our error computation is based on float,
though, and should therefore create more accurate values).
* The i965 introduced a special register for the surface; the former display base register
is now only used for the view offset. Instead of setting the base manually here and there,
there is now a set_frame_buffer_base() function.
* The DPMS code will now also turn off/on the PLL clock generator.
* The code needs some more cleanup, and while the driver now produces the correct timing on
my i965 system, I'm now greeted by a black screen after startup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22289 a95241bf-73f2-0310-859d-f6bbb57e9c96

Implemented I2C support to get the DDC EDID info from the monitor - it's working as is, but
nothing is done with the data yet (besides dumping them to the serial output).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22272 a95241bf-73f2-0310-859d-f6bbb57e9c96

Forgot to commit the header...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22255 a95241bf-73f2-0310-859d-f6bbb57e9c96

* The second open will now fail, too, in case the hardware could not be initialized
correctly.
* Got rid of this superfluous cookie stuff - either the VFS behaves correctly, or
we're screwed anyway.
* Made adding debugger commands optional depending on if DEBUG_COMMANDS is defined
or not.
* Minor other cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@21322 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Work in progress to support the i965 chipset as well; still works on i865, but
doesn't work on i965 yet.
* B_GET_DISPLAY_MODE now returns the mode actually configured in the chip instead
of the last mode set; while this isn't really necessary, it allows to check what
mode was used during startup.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@21321 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Obviously, the i9xx family has changed the order of the PCI mappings, so we need
to take that into account.
* Introduced INTEL_TYPE_FAMILY_MASK and INTEL_TYPE_GROUP_MASK to better
differentiate the device type.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@18293 a95241bf-73f2-0310-859d-f6bbb57e9c96

* B_MOVE_DISPLAY and B_SET_INDEXED_COLORS should now work for the digital
output as well.
* Obviously got the register for INTEL_DISPLAY_B_DIGITAL_PORT wrong - it's
not 0x61000 but 0x61140, maybe that can explain the fun we had at BeGeistert :)
* Renamed the analog display registers to better fit the digital ones, ie.
replaced DISPLAY with DISPLAY_A - although this might be not really correct
as it seems that the pipes can be selected arbitrarily.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17566 a95241bf-73f2-0310-859d-f6bbb57e9c96

Some work to support output on the digital interface like laptop panels.
Need to clean this up, though. It even sort of worked on tic's IBM X40
on BeGeistert - if you weren't irritated by the fact some parts of the
screen were just black, that is :-)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17565 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Added i830 as supported chipset - doesn't work perfectly, though. But Kyan reports
that at least 8 bit modes seems to work (but overlay only partially)
* Added "hardware_cursor" option to the settings file - when set to "false", you should
have a cursor in the second output now as well.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17498 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now disables the VGA display mode explicetly, which allows it to work
without having a VESA mode set first (thanks to Stephan for noticing
this).
* intel_set_display_mode() now calls intel_propose_display_mode() to make
sure the mode passed in is valid. Note, B_PROPOSE_DISPLAY_MODE is still
not working correctly (which will cause problems for BWindowScreen and
friends).
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17460 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Made the accelerant safer to use when cloned (though I didn't test cloning yet);
introduced a lock that is used in B_SET_DISPLAY_MODE etc.
* Correctly implemented B_ACQUIRE_ENGINE and B_RELEASE_ENGINE now (ie. they lock
the engine now).
* The lock of the ring buffers is now deleted when the (primary) accelerant is closed.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17453 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Moved the intel_info structure and prototypes from intel_extreme.cpp from the shared
headers into intel_extreme_private.h.
* Removed non-memory-mapped definitions from driver.h.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17452 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Implemented hardware cursor support.
* Turns out cursor handling is simpler as originally thought, so I could remove its
physical mapping - it's still put into the shared area, though, although that isn't
needed for this chip (but could eventually simplify the handling of other generations
of this chip).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17450 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Accidently overwrote info.registers which let all subsequent register writes
(in the kernel driver) fail - or crash the system.
* Waiting for VBLANK now works as expected - you actually have to *set* the bit
to clear it, isn't that obvious? :-)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17443 a95241bf-73f2-0310-859d-f6bbb57e9c96

Implemented vblank interrupt and support for the retrace semaphore - not yet
tested, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17439 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Prepared having hardware cursor support; got quite complicated because there
is no good (or reliable) way to retrieve the physical address of "stolen"
(by the BIOS) graphics memory.
* Implemented allocation of additional graphics memory in case the BIOS was
a bit too cheap. We now guarantee 8 MB of memory available to the graphics
chip - would be nicer to only allocate that on demand, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17433 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Implemented B_FILL_SPAN - I am not sure if it's used at all, though, so
I am also not sure if it's working correctly.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17425 a95241bf-73f2-0310-859d-f6bbb57e9c96

Say hello to B_FILL_RECTANGLE and B_INVERT_RECTANGLE - only B_FILL_SPAN is missing
from the acceleration hooks in BeOS.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17424 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Turns out the virtual messes with the data in struct command, so we can't
use it (which isn't really that bad).
* B_SCREEN_TO_SCREEN_BLIT is now working as intended, so we can finally move
windows and scroll at decent speed :-)
* Implemented a simple version of B_WAIT_ENGINE_IDLE for now.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17422 a95241bf-73f2-0310-859d-f6bbb57e9c96

Started implementing screen-to-screen blits, not yet tested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17416 a95241bf-73f2-0310-859d-f6bbb57e9c96

* The Y/RGB and UV registers for the integer downscale factor are reverse to
the usual order of other registers, so I mixed it up: vertical downscaling
is now working as expected as well.
* The downscaling factor was a tiny bit too low (one pixel from the view).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17414 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now allocates space for the hardware status page and cursor memory, not yet
used, though.
* Renamed the PhyisicalPageMapper class to AreaKeeper and made it a bit more
generic (ie. it can now also create usual areas)
* The shared_info is now created using the AreaKeeper, too, and this actually
fixes some potential memory leaks.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17412 a95241bf-73f2-0310-859d-f6bbb57e9c96

We're now using a secondary (high priority) ring buffer for hardware
overlay - this will improve the overlay performance when the engine is
under load (the acceleration engine will use the primary lower priority
ring buffer).



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17411 a95241bf-73f2-0310-859d-f6bbb57e9c96

The size of the stolen memory for the graphics chip is now read out of the host bridge.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17381 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Turns out you must not set the source width/height UV registers (for planar
mode), but you have to set the scaling UV registers in order to have correct
overlay.
* In other words, overlay is working now! There are still issues with it, which
can probably be attributed to missing bounds checks (the screen goes black
when you leave full-screen mode in VLC - but not if overlay just stops).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17365 a95241bf-73f2-0310-859d-f6bbb57e9c96

B_SET_INDEXED_COLORS is now working correctly for B_CMAP8, IOW you can now use
8 bit modes with this driver as well.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17339 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Finally the overlay looks like an overlay. It took me almost a day to realize that
the Intel chip obviously cannot do overlays in B_RGB16 - even though it pretends
to be able to do that.
* B_YCbCr422 seems to work, though, I haven't tested any other spaces for now, and
I somewhat doubt they will work. It's all green, though, and the scaling doesn't
seem to be correct - that we be solvable, though :)
* There aren't any bounds checks (so don't move the window out of the screen), and
also the overlay_view offsets are ignored.
* Scaling and moving is now detected, and there is always as little work done as
possible to reduce the workload on buffer switches (the most common case).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17315 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Doh, I had done all bitfields in the wrong direction (msb to lsb, but it's actually
lsb to msb).
* The result is that there is now *something* to see when overlay is turned on. In
fact the whole screen goes dark besides a few pixels on the top - now isn't that
something? :-)
* The overlay is also turned off again correctly - which also revealed a bug in our
app_server: B_CONFIGURE_OVERLAY is not always called with window=NULL/view=NULL
to turn off overlay (might be an incorrect handling of BView::ClearOverlay()).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17300 a95241bf-73f2-0310-859d-f6bbb57e9c96

Enabling overlay requires a command ring buffer, and we're setting one (very
small) up for this specific task - this will later be used for the acceleration
engine as well.
Some more work on overlay initialization, doesn't do anything yet, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17254 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Added overlay register definitions.
* The overlay register update buffer is now created and exported, ready
to be used.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17244 a95241bf-73f2-0310-859d-f6bbb57e9c96

Implemented overlay management. The hardware doesn't notice them yet, though :)
(but the app_server thinks they're working).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17242 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Now using Thomas memory manager to manage the graphics memory; allocation
of graphics memory is now possible.
* Changed driver name to start with "intel_extreme" to have a nicer device
name.
* Renamed frame_buffer* stuff to graphics_memory* as the frame buffer just
happens to be located somewhere in the graphics memory.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17224 a95241bf-73f2-0310-859d-f6bbb57e9c96

* init_driver() now behaves better in low memory situations.
* Some preparations to support more than one chipset, added i855G (device ID 0x3582)
to test with - the accelerant_device_info is now filled with that additional data
as well.
* Some minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16982 a95241bf-73f2-0310-859d-f6bbb57e9c96

Very basic driver for the "Intel Extreme Graphics 2" chips, only supports i865G for now.
Only mode switches do work, doesn't yet make sure the mode is valid, though.
At this point, this driver only works on Haiku, the R5 app_server is crashing for some
reason I need to investigate some day (maybe tomorrow :)).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16872 a95241bf-73f2-0310-859d-f6bbb57e9c96