Searched refs:SHIFT16 (Results 1 - 14 of 14) sorted by relevance
/freebsd-11-stable/sys/dev/pms/RefTisa/sallsdk/spc/ |
H A D | sassp.c | 1050 pIRequest->dif.udtArray[4] << SHIFT16 | 1060 pIRequest->dif.udrtArray[0] << SHIFT16 ); 1062 pIRequest->dif.udrtArray[4] << SHIFT16 | 1089 ((pIRequest->dif.DIFPerLARegion0SecCount << SHIFT16) | 1159 encryptFlags |= (pIRequest->encrypt.EncryptionPerLRegion0SecCount) << SHIFT16; 1477 pTRequest->dif.udtArray[4] << SHIFT16 | 1487 pTRequest->dif.udrtArray[0] << SHIFT16 ); 1489 pTRequest->dif.udrtArray[4] << SHIFT16 | 1513 ((pTRequest->dif.DIFPerLARegion0SecCount << SHIFT16) | 1621 (pTResponse->agTag << SHIFT16) | od [all...] |
H A D | saport.c | 618 encryptInfo->status = (ScratchPad3 & SCRATCH_PAD3_V_ERR_CODE ) >> SHIFT16; 641 encryptInfo->status = (ScratchPad3 & SCRATCH_PAD3_V_ERR_CODE ) >> SHIFT16; 861 (newKekIndex << SHIFT24) | (wrapperKekIndex << SHIFT16) | blobFormat << SHIFT14 | (flags << SHIFT8) | KEK_MGMT_SUBOP_UPDATE); 906 (1 << SHIFT24) | (1 << SHIFT16) | (1 << SHIFT8) | KEK_MGMT_SUBOP_KEYCARDUPDATE); 950 kekIndex << SHIFT16 | KEK_MGMT_SUBOP_INVALIDATE);
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H A D | sampicmd.c | 784 Sscd = (agPhyConfig->phyProperties & 0xf0000) >> SHIFT16; 1282 mcn = (flag & 0xF0000) >>SHIFT16; 1287 ha << SHIFT16 | \ 1581 (NVMDInfo->TWIDeviceAddress << SHIFT16) | (NVMDInfo->TWIBusNumber << SHIFT12) | 1696 (NVMDInfo->TWIDeviceAddress << SHIFT16) | (NVMDInfo->TWIBusNumber << SHIFT12) | 1743 (NVMDInfo->TWIDeviceAddress << SHIFT16) | (NVMDInfo->TWIBusNumber << SHIFT12) | 2049 (agSASConfig->openRejectRetriesCmd << SHIFT16) | agSASConfig->openRejectRetriesData); 2848 agDifEncOffload->dif.udrtArray[0] << SHIFT16 | 2854 agDifEncOffload->dif.udtArray[4] << SHIFT16 | 2859 agDifEncOffload->dif.udrtArray[4] << SHIFT16 | [all...] |
H A D | sasmp.c | 314 IR_IP_OV_res_phyId_DPdLen_res |= (((pSMPFrame->outFrameLen) & 0xff) << SHIFT16); 401 IR_IP_OV_res_phyId_DPdLen_res |= (((pSMPFrame->outFrameLen) & 0xff) << SHIFT16); 460 IR_IP_OV_res_phyId_DPdLen_res |= (((pSMPFrame->outFrameLen) & 0xff) << SHIFT16);
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H A D | sampirsp.c | 1231 phyId = (npipps & PHY_ID_V_BITS) >> SHIFT16; 1382 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1404 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1413 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1424 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1436 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1448 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1460 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1480 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 1531 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16) | (linkRat [all...] |
H A D | mpi.c | 398 ((responseQueue & OBID_MASK) << SHIFT16) | 525 ((responseQueue & OBID_MASK) << SHIFT16) | 903 ret = (saRoot->OBQnumber << SHIFT16) | saRoot->IBQnumber; 951 ((responseQueue & OBID_MASK) << SHIFT16) |
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H A D | sadefs.h | 217 #define SHIFT16 16 macro
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H A D | sahw.c | 1594 regVal = (ossaHwRegReadExt(agRoot, PCIBAR3, HDA_RSP_OFFSET1MB+HDA_CMD_CODE_OFFSET) & HDA_SEQ_ID_BITS ) >> SHIFT16; 1596 regVal = (HDA_C_PA << SHIFT24) | (regVal << SHIFT16) | HDAC_EXEC_CMD; 2031 hdacmd.C_PA_SEQ_ID_CMD_CODE = ( SPC_V_HDAC_PA << SHIFT24 ) | ( seq_id << SHIFT16 )| SPC_V_HDAC_DMA; 2073 hda_command_complete = ((ossaHwRegReadExt(agRoot, PCIBAR0, SPC_V_HDA_RESPONSE_OFFSET+28) & SPC_V_HDAR_SEQID_MASK ) >> SHIFT16) == seq_id; 2122 hda_command_complete = ((ossaHwRegReadExt(agRoot, PCIBAR0, SPC_V_HDA_RESPONSE_OFFSET+28) & SPC_V_HDAR_SEQID_MASK ) >> SHIFT16) == seq_id; 2153 hda_command_complete = ((ossaHwRegReadExt(agRoot, PCIBAR0, SPC_V_HDA_RESPONSE_OFFSET+28) & SPC_V_HDAR_SEQID_MASK ) >> SHIFT16) == seq_id; 2195 hdacmd.C_PA_SEQ_ID_CMD_CODE = ( SPC_V_HDAC_PA << SHIFT24 ) | ( seq_id << SHIFT16 )| SPC_V_HDAC_EXEC; 2259 hda_command_complete = ((ossaHwRegReadExt(agRoot, PCIBAR0, SPC_V_HDA_RESPONSE_OFFSET+28) & SPC_V_HDAR_SEQID_MASK ) >> SHIFT16) == seq_id;
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H A D | sasata.c | 315 (agTag << SHIFT16) | 351 (agTag << SHIFT16) | 421 encryptFlags |= (agSATAReq->encrypt.EncryptionPerLRegion0SecCount << SHIFT16);
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H A D | sainit.c | 1714 (enable64 << SHIFT16) | 1735 (queueConfig->generalEventQueue << SHIFT16) | 1740 (queueConfig->sasHwEventQueue[2] << SHIFT16) | 1744 (queueConfig->sasHwEventQueue[6] << SHIFT16) | 1748 (queueConfig->sataNCQErrorEventQueue[2] << SHIFT16) | 1752 (queueConfig->sataNCQErrorEventQueue[6] << SHIFT16) | 2328 (config->inboundQueues[qIdx].elementSize << SHIFT16) | 2436 (config->outboundQueues[qIdx].elementSize << SHIFT16); 2454 ((config->outboundQueues[qIdx].interruptThreshold & INT_THR_BITS ) << SHIFT16) | 2724 GSTLenMPIS = GSTLenMPIS >> SHIFT16; [all...] |
H A D | saioctlcmd.c | 900 controllerInfo->maxDevices = controllerInfo->maxDevices >> SHIFT16; 1224 (( controllerStatus->fatalErrorInfo.errorInfo3 & 0x3) << SHIFT16) | /* bit 16 17 */ 1227 ((( controllerStatus->fatalErrorInfo.errorInfo3 >> SHIFT16) & 0xFF) << SHIFT24) );/* bit 24 31 */ 1285 SA_DBG1(("saGetControllerStatus: bootStatus Encryption Cap %x\n", ((controllerStatus->bootStatus & 0x30000 ) >> SHIFT16) )); 3599 IR_IP_OV_res_phyId_DPdLen_res = (pSMPFrame->outFrameLen << SHIFT16) | pSMPFrame->flag; 3864 UDTR5_UDTR2 = (( diag->udrtArray[5] << SHIFT24) | (diag->udrtArray[4] << SHIFT16) | (diag->udrtArray[3] << SHIFT8) | diag->udrtArray[2]); 3865 UDT5_UDT2 = (( diag->udtArray[5] << SHIFT24) | (diag->udtArray[4] << SHIFT16) | (diag->udtArray[3] << SHIFT8) | diag->udtArray[2]); 3866 UDTR1_UDT0 = (( diag->udrtArray[1] << SHIFT24) | (diag->udrtArray[0] << SHIFT16) | (diag->udtArray[1] << SHIFT8) | diag->udtArray[0]);
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H A D | saphy.c | 341 status |= ((npipps & PORT_STATE_MASK) << SHIFT16); 354 status |= ((npipps & PORT_STATE_MASK) << SHIFT16);
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H A D | saint.c | 2173 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16); 2328 phyId |= (npipps & PHY_IN_PORT_MASK) | ((npipps & PORT_STATE_MASK) << SHIFT16);
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/freebsd-11-stable/sys/dev/msk/ |
H A D | if_mskreg.h | 207 #define SHIFT16(x) ((x) << 16) macro 955 #define Y2_CLK_DIV_VAL(x) (SHIFT16(x) & Y2_CLK_DIV_VAL_MSK) 960 #define Y2_CLK_SEL_VAL_2(x) (SHIFT16(x) & Y2_CLK_SELECT2_MSK)
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