Searched refs:SET (Results 1 - 25 of 44) sorted by relevance

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/linux-master/tools/testing/selftests/bpf/progs/
H A Dkprobe_multi.c47 #define SET(__var, __addr, __cookie) ({ \ macro
54 SET(kretprobe_test1_result, &bpf_fentry_test1, 8);
55 SET(kretprobe_test2_result, &bpf_fentry_test2, 2);
56 SET(kretprobe_test3_result, &bpf_fentry_test3, 7);
57 SET(kretprobe_test4_result, &bpf_fentry_test4, 6);
58 SET(kretprobe_test5_result, &bpf_fentry_test5, 5);
59 SET(kretprobe_test6_result, &bpf_fentry_test6, 4);
60 SET(kretprobe_test7_result, &bpf_fentry_test7, 3);
61 SET(kretprobe_test8_result, &bpf_fentry_test8, 1);
63 SET(kprobe_test1_resul
73 #undef SET macro
[all...]
H A Duprobe_multi.c47 #define SET(__var, __addr, __cookie) ({ \ macro
54 SET(uretprobe_multi_func_1_result, uprobe_multi_func_1_addr, 2);
55 SET(uretprobe_multi_func_2_result, uprobe_multi_func_2_addr, 3);
56 SET(uretprobe_multi_func_3_result, uprobe_multi_func_3_addr, 1);
58 SET(uprobe_multi_func_1_result, uprobe_multi_func_1_addr, 3);
59 SET(uprobe_multi_func_2_result, uprobe_multi_func_2_addr, 1);
60 SET(uprobe_multi_func_3_result, uprobe_multi_func_3_addr, 2);
63 #undef SET macro
/linux-master/drivers/gpu/drm/xe/
H A Dxe_wa.c104 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),
109 XE_RTP_ACTIONS(SET(DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE))
120 XE_RTP_ACTIONS(SET(SUBSLICE_UNIT_LEVEL_CLKGATE2, CPSSUNIT_CLKGATE_DIS))
124 XE_RTP_ACTIONS(SET(UNSLICE_UNIT_LEVEL_CLKGATE2, VSUNIT_CLKGATE2_DIS))
131 XE_RTP_ACTIONS(SET(UNSLICE_UNIT_LEVEL_CLKGATE, CG3DDISCFEG_CLKGATE_DIS))
135 XE_RTP_ACTIONS(SET(SUBSLICE_UNIT_LEVEL_CLKGATE, DSS_ROUTER_CLKGATE_DIS))
143 XE_RTP_ACTIONS(SET(RENDER_MOD_CTRL, FORCE_MISS_FTLB),
144 SET(COMP_MOD_CTRL, FORCE_MISS_FTLB),
145 SET(XEHP_VDBX_MOD_CTRL, FORCE_MISS_FTLB),
146 SET(XEHP_VEBX_MOD_CTR
[all...]
H A Dxe_tuning.c21 XE_RTP_ACTIONS(SET(XEHP_L3SCQREG7, BLEND_FILL_CACHING_OPT_DIS))
25 XE_RTP_ACTIONS(SET(XEHP_SQCM, EN_32B_ACCESS))
46 XE_RTP_ACTIONS(SET(L3SQCREG3, COMPPWOVERFETCHEN))
55 XE_RTP_ACTIONS(SET(SAMPLER_MODE, INDIRECT_STATE_BASE_ADDR_OVERRIDE))
85 XE_RTP_ACTIONS(SET(CHICKEN_RASTER_2, TBIMR_FAST_CLIP))
/linux-master/drivers/gpu/drm/xe/tests/
H A Dxe_rtp_test.c65 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
69 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
84 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
88 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
103 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
107 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
122 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
126 XE_RTP_ACTIONS(SET(REGULAR_REG2, REG_BIT(0)))
141 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
180 XE_RTP_ACTIONS(SET(REGULAR_REG
[all...]
/linux-master/drivers/gpu/drm/sti/
H A Dsti_awg_utils.c17 SET, enumerator in enum:opcode
67 * pixel. So we transform SKIP into SET
69 opcode = SET;
97 case SET:
138 ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET,
148 ret |= awg_generate_instr(SET, val, 0, 0, fwparams);
/linux-master/drivers/clk/mxs/
H A Dclk-pll.c36 writel_relaxed(1 << pll->power, pll->base + SET);
63 writel_relaxed(1 << 31, pll->base + SET);
H A Dclk.h14 #define SET 0x4 macro
H A Dclk-imx28.c74 writel_relaxed(clkmux << BP_SAIF_CLKMUX, DIGCTRL + SET);
84 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);
87 writel_relaxed(1 << BP_ENET_DIV_TIME, ENET + SET);
H A Dclk-imx23.c49 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);
70 writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET);
H A Dclk-ref.c44 writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + SET);
/linux-master/drivers/clk/imx/
H A Dclk-pfd.c22 * register has SET, CLR and TOG registers at offset 0x4 0x8 and 0xc.
32 #define SET 0x4 macro
49 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + SET);
101 writel_relaxed(frac << (pfd->idx * 8), pfd->reg + SET);
/linux-master/drivers/pinctrl/freescale/
H A Dpinctrl-mxs.h12 #define SET 0x4 macro
H A Dpinctrl-mxs.c294 writel(1 << shift, reg + SET);
305 writel(1 << shift, reg + SET);
/linux-master/drivers/pwm/
H A Dpwm-mxs.c17 #define SET 0x4 macro
110 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);
/linux-master/scripts/gcc-plugins/
H A Darm_ssp_per_task_plugin.c19 * Find a SET insn involving a SYMBOL_REF to __stack_chk_guard
24 if (GET_CODE(body) != SET ||
32 * Replace the source of the SET insn with an expression that
/linux-master/arch/arm/boot/compressed/
H A Dhead-sharpsl.S131 bic r3, r3, #0x11 @ SET NCE
132 orr r3, r3, #0x0a @ SET CLR + FLWP
137 orr r3, r3, #4 @ SET ALE
/linux-master/arch/mips/mm/
H A Duasm-mips.c88 [insn_dmfc0] = {M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
91 [insn_dmtc0] = {M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
139 [insn_mfc0] = {M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
140 [insn_mfhc0] = {M(cop0_op, mfhc0_op, 0, 0, 0, 0), RT | RD | SET},
147 [insn_mtc0] = {M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
148 [insn_mthc0] = {M(cop0_op, mthc0_op, 0, 0, 0, 0), RT | RD | SET},
265 if (ip->fields & SET)
/linux-master/include/video/
H A Dgbe.h85 #define SET(v, f, msb, lsb) \ macro
91 SET((v), (f), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB)
/linux-master/drivers/gpu/drm/imx/dcss/
H A Ddcss-dev.h15 #define SET 0x04 macro
21 #define dcss_set(v, c) writel((v), (c) + SET)
/linux-master/tools/perf/util/
H A Ddata-convert-bt.c136 pr2(" SET [%s = %" PRIu64 "]\n", name, val);
1414 #define SET(__n, __v) \ macro
1420 SET(frequency, 1000000000);
1421 SET(offset, offset);
1422 SET(description, desc);
1423 SET(precision, 10);
1424 SET(is_absolute, 0);
1426 #undef SET macro
/linux-master/drivers/scsi/
H A Dscript_asm.pl669 # Handle SET and CLEAR instructions. Note that we should also do something
671 } elsif (/^\s*(SET|CLEAR)\s+(.*)/i) {
674 $code[$address] = ($set =~ /SET/i) ? 0x58_00_00_00 :
774 SELECT SET, or WAIT
/linux-master/scripts/
H A Dasn1_compiler.c183 "SET",
272 _(SET),
671 SET, enumerator in enum:compound
1048 element->compound = SET;
1419 case SET:
1476 case SET:
1586 case SET:
1587 /* I can't think of a nice way to do SET support without having
1593 fprintf(stderr, "The ASN.1 SET type is not currently supported.\n");
/linux-master/security/apparmor/include/
H A Dlabel.h200 #define label_for_each_not_in_set(I, SET, SUB, P) \
202 ((P) = __aa_label_next_not_in_set(&(I), (SET), (SUB))); \
/linux-master/arch/arm64/net/
H A Dbpf_jit.h125 * ST{ADD,CLR,SET,EOR} is simply encoded as an alias for
126 * LDD{ADD,CLR,SET,EOR} with XZR as the destination register.
136 #define A64_STSET(sf, Rn, Rs) A64_ST_OP(sf, Rn, Rs, SET)
146 #define A64_LDSETAL(sf, Rt, Rn, Rs) A64_LD_OP_AL(sf, Rt, Rn, Rs, SET)

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