Searched refs:SCC (Results 1 - 11 of 11) sorted by relevance

/linux-master/arch/powerpc/include/asm/
H A Dhydra.h47 char SCC[0x1000]; member in struct:Hydra
61 #define HYDRA_FC_SCC_CELL_EN 0x00000001 /* Enable SCC Clock */
63 #define HYDRA_FC_SCCA_ENABLE 0x00000004 /* Enable SCC A Lines */
64 #define HYDRA_FC_SCCB_ENABLE 0x00000008 /* Enable SCC B Lines */
66 #define HYDRA_FC_RESET_SCC 0x00000020 /* Reset SCC */
/linux-master/arch/m68k/include/asm/
H A Datarihw.h96 ATARIHW_DECLARE(SCC); /* Serial Communications Contr. */
97 ATARIHW_DECLARE(ST_ESCC); /* SCC Z83230 in an ST */
105 ATARIHW_DECLARE(SCC_DMA); /* DMA for the SCC */
438 ** SCC Z8530
442 struct SCC struct
452 # define atari_scc ((*(volatile struct SCC*)SCC_BAS))
455 # define st_escc ((*(volatile struct SCC*)0xfffffa31))
458 /* TT SCC DMA Controller (same chip as SCSI DMA) */
/linux-master/arch/m68k/atari/
H A Dataints.c17 * Corrected a bug in atari_add_isr() which rejected all SCC
63 * TT-MFP, SCC, and finally VME interrupts. Vector numbers for the latter can
296 if (ATARIHW_PRESENT(SCC) && !atari_SCC_reset_done) {
306 * needs them?) MFP and SCC are
309 tt_scu.vme_mask = 0x60; /* enable MFP and SCC ints */
H A Dconfig.c78 /* ++roman: This is a more elaborate test for an SCC chip, since the plain
79 * Medusa board generates DTACK at the SCC's standard addresses, but a SCC
310 ATARIHW_SET(SCC);
311 pr_cont(" SCC");
633 ATARIHW_ANNOUNCE(SCC, "Serial Communications Controller SCC 8530");
634 ATARIHW_ANNOUNCE(ST_ESCC, "Extended Serial Communications Controller SCC 85230");
640 ATARIHW_ANNOUNCE(SCC_DMA, "DMA Controller for SCC");
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx8.asm164 s_getreg_b32 s_save_status, hwreg(HW_REG_STATUS) //save STATUS since we will change SCC
177 set_status_without_spi_prio(s_save_status, ttmp2) //restore HW status(SCC)
188 set_status_without_spi_prio(s_save_status, ttmp2) //restore HW status(SCC)
664 set_status_without_spi_prio(s_restore_status, s_restore_tmp) // SCC is included, which is changed by previous salu
H A Dcwsr_trap_handler_gfx10.asm197 s_getreg_b32 s_save_status, hwreg(HW_REG_STATUS) //save STATUS since we will change SCC
1230 s_setreg_b32 hwreg(HW_REG_STATUS), s_restore_status // SCC is included, which is changed by previous salu
1235 s_setreg_b32 hwreg(HW_REG_STATUS), s_restore_status // SCC is included, which is changed by previous salu
H A Dcwsr_trap_handler_gfx9.asm200 s_getreg_b32 s_save_status, hwreg(HW_REG_STATUS) //save STATUS since we will change SCC
913 set_status_without_spi_prio(s_restore_status, s_restore_tmp) // SCC is included, which is changed by previous salu
/linux-master/drivers/net/ethernet/intel/e1000e/
H A Dmac.c350 er32(SCC);
H A Dnetdev.c4955 adapter->stats.scc += er32(SCC);
/linux-master/drivers/net/ethernet/intel/e1000/
H A De1000_main.c3632 adapter->stats.scc += er32(SCC);
H A De1000_hw.c4661 er32(SCC);

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