Searched refs:RS1 (Results 1 - 6 of 6) sorted by relevance
| /linux-master/arch/sparc/crypto/ |
| H A D | opcodes.h | 11 #define RS1(x) (FPD_ENCODE(x) << 14) macro
19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c));
31 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d));
33 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d));
35 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d));
37 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d));
39 .word (F3F(2, 0x19, 4)|RS1(a)|RS2(b)|RS3(c)|RD(d));
41 .word (F3F(2, 0x19, 5)|RS1(a)|RS2(b)|RS3(c)|RD(d));
43 .word (F3F(2, 0x19, 6)|RS1(a)|RS2(b)|RS3(c)|RD(d));
45 .word (F3F(2, 0x19, 7)|RS1(
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| /linux-master/arch/riscv/include/asm/ |
| H A D | insn-def.h | 140 __RD(0), RS1(vaddr), RS2(asid))
144 __RD(0), RS1(gaddr), RS2(vmid))
148 RD(dest), RS1(addr), __RS2(3))
152 RD(dest), RS1(addr), __RS2(0))
157 RD(dest), RS1(addr), __RS2(0))
165 __RD(0), RS1(vaddr), RS2(asid))
177 __RD(0), RS1(vaddr), RS2(asid))
181 __RD(0), RS1(gaddr), RS2(vmid))
185 RS1(base), SIMM12(0))
189 RS1(bas
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| /linux-master/arch/arm/include/debug/ |
| H A D | vexpress.S | 28 @ - all other (RS1 complaint) tiles use UART mapped
40 @ RS1 memory map
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| /linux-master/arch/sparc/net/ |
| H A D | bpf_jit_comp_64.c | 55 #define RS1(X) ((X) << 14) macro
139 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
263 emit(OR | RS1(G0) | RS2(from) | RD(to), ctx);
284 emit(XOR | IMMED | RS1(reg) | S13(lbits) | RD(reg), ctx);
290 emit(opcode | RS1(dst) | RS2(src) | RD(dst), ctx);
295 emit(opcode | RS1(a) | RS2(b) | RD(c), ctx);
304 insn |= RS1(dst) | RD(dst);
323 insn |= RS1(src) | RD(dst);
340 emit(OR | IMMED | RS1(G0) | S13(K) | RD(dest), ctx);
350 emit(OR | IMMED | RS1(G
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| H A D | bpf_jit_comp_32.c | 26 #define RS1(X) ((X) << 14) macro
71 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
113 *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
118 *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \
123 *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \
140 *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
161 _insn |= RS1(r_A) | RD(r_A); \
175 *prog++ = OR | IMMED | RS1(G0) | S13(K) | RD(DEST); \
184 *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
190 *prog++ = LD32I | RS1(BAS
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| /linux-master/arch/sparc/kernel/ |
| H A D | visemul.c | 136 #define RS1(INSN) (((INSN) >> 14) & 0x1f) macro
299 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0);
300 orig_rs1 = rs1 = fetch_reg(RS1(insn), regs);
377 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0);
378 rs1 = fetch_reg(RS1(insn), regs);
410 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0);
411 rs1 = fetch_reg(RS1(insn), regs);
430 rs1 = fpd_regval(f, RS1(insn));
454 rs1 = fpd_regval(f, RS1(insn));
510 rs1 = fpd_regval(f, RS1(ins
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