Searched refs:PORT_E (Results 1 - 17 of 17) sorted by path
| /linux-master/drivers/gpu/drm/i915/display/ |
| H A D | intel_bios.c | 2324 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2342 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2903 else if (port == PORT_E)
2908 if (port != PORT_A && port != PORT_E)
2911 if (port != PORT_E)
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| H A D | intel_crt.c | 1079 assert_port_valid(dev_priv, PORT_E);
1081 crt->base.port = PORT_E;
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| H A D | intel_ddi.c | 1065 _skl_ddi_set_iboost(dev_priv, PORT_E, iboost);
2757 is_mst && (port == PORT_A || port == PORT_E));
3253 [PORT_E] = TRANSCODER_A,
3258 if (drm_WARN_ON(&dev_priv->drm, port < PORT_A || port > PORT_E))
3304 if (port == PORT_E)
3316 if (port == PORT_E)
4675 if (port == PORT_A || port == PORT_E) {
4823 case PORT_E:
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| H A D | intel_ddi_buf_trans.c | 1178 if (port == PORT_A || port == PORT_E)
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| H A D | intel_display.h | 138 case PORT_E:
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| H A D | intel_display_device.c | 412 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
432 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
472 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
558 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
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| H A D | intel_display_limits.h | 82 PORT_E, enumerator in enum:port
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| H A D | intel_dp_aux.c | 823 if (DISPLAY_VER(i915) == 9 && encoder->port == PORT_E)
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| H A D | intel_dp_mst.c | 1794 if (DISPLAY_VER(i915) < 11 && port == PORT_E)
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| H A D | intel_dpll_mgr.c | 3357 if (port == PORT_D || port == PORT_E) {
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| H A D | intel_fdi.c | 922 intel_de_write(dev_priv, DP_TP_CTL(PORT_E),
932 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E),
936 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E));
959 temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E));
979 intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);
980 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E));
983 intel_de_rmw(dev_priv, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0);
984 intel_de_posting_read(dev_priv, DP_TP_CTL(PORT_E));
986 intel_wait_ddi_buf_idle(dev_priv, PORT_E);
996 intel_de_write(dev_priv, DP_TP_CTL(PORT_E),
[all...] |
| H A D | intel_hdcp.c | 431 case PORT_E:
1166 (DISPLAY_VER(i915) >= 12 || port < PORT_E);
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| H A D | intel_opregion.c | 407 if (port == PORT_E) {
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| /linux-master/drivers/gpu/drm/i915/gvt/ |
| H A D | display.c | 485 intel_vgpu_has_monitor_on_port(vgpu, PORT_E)) {
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| H A D | edid.c | 95 port = PORT_E;
119 port = PORT_E;
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| H A D | handlers.c | 804 if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E)))
805 vgpu_vreg_t(vgpu, DP_TP_STATUS(PORT_E))
823 u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E));
825 u32 tx_ctl = vgpu_vreg_t(vgpu, DP_TP_CTL(PORT_E));
938 vgpu_vreg_t(vgpu, DP_TP_STATUS(PORT_E)) |=
944 calc_index(offset, _DP_TP_CTL_A, _DP_TP_CTL_B, 0, DP_TP_CTL(PORT_E))
2348 MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write);
2354 MMIO_DH(DP_TP_CTL(PORT_E), D_ALL, NULL, dp_tp_ctl_mmio_write);
2360 MMIO_DH(DP_TP_STATUS(PORT_E), D_ALL, NULL, NULL);
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| /linux-master/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 491 MMIO_D(PORT_CLK_SEL(PORT_E));
522 MMIO_D(DDI_BUF_CTL(PORT_E));
527 MMIO_D(DP_TP_CTL(PORT_E));
532 MMIO_D(DP_TP_STATUS(PORT_E));
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Completed in 354 milliseconds