Searched refs:PHYESYMCLK_CLOCK_CNTL (Results 1 - 8 of 8) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_dccg.h | 41 SR(PHYESYMCLK_CLOCK_CNTL),\
89 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_EN, mask_sh),\
90 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_SRC_SEL, mask_sh),\
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| H A D | dcn31_dccg.c | 522 REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL,
529 REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_dccg.h | 47 SR(PHYESYMCLK_CLOCK_CNTL),\
184 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_EN, mask_sh),\
185 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_SRC_SEL, mask_sh),\
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_dccg.h | 55 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_EN, mask_sh),\
56 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_SRC_SEL, mask_sh),\
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
| H A D | dcn35_dccg.h | 147 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_EN, mask_sh),\
148 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_SRC_SEL, mask_sh),\
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| H A D | dcn35_dccg.c | 451 REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL,
455 REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dccg.h | 361 uint32_t PHYESYMCLK_CLOCK_CNTL; member in struct:dccg_registers
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| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.h | 1227 SR(PHYESYMCLK_CLOCK_CNTL), SR(DPSTREAMCLK_CNTL), SR(HDMISTREAMCLK_CNTL), \
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