Searched refs:I915_CACHE_NONE (Results 1 - 25 of 34) sorted by relevance
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| /linux-master/drivers/gpu/drm/i915/gt/ |
| H A D | intel_ggtt_gmch.c | 24 unsigned int flags = (pat_index == I915_CACHE_NONE) ?
35 unsigned int flags = (pat_index == I915_CACHE_NONE) ?
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| H A D | selftest_reset.c | 90 I915_CACHE_NONE),
133 I915_CACHE_NONE),
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| H A D | intel_ggtt.c | 1194 I915_CACHE_NONE),
1311 case I915_CACHE_NONE:
1334 case I915_CACHE_NONE:
1353 if (pat_index != I915_CACHE_NONE)
1365 if (pat_index != I915_CACHE_NONE)
1378 case I915_CACHE_NONE:
1582 I915_CACHE_NONE),
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| H A D | gen8_ppgtt.c | 24 if (level != I915_CACHE_NONE)
47 case I915_CACHE_NONE:
859 I915_CACHE_NONE),
878 obj->encode = gen8_pde_encode(px_dma(obj), I915_CACHE_NONE);
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| H A D | selftest_migrate.c | 906 I915_CACHE_NONE),
997 I915_CACHE_NONE),
1001 I915_CACHE_NONE),
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| H A D | intel_migrate.c | 49 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE),
69 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE),
81 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE),
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| H A D | gen6_ppgtt.c | 231 I915_CACHE_NONE),
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| H A D | selftest_tlb.c | 41 i915_gem_get_pat_index(ce->vm->i915, I915_CACHE_NONE);
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| /linux-master/drivers/gpu/drm/i915/display/ |
| H A D | intel_dsb_buffer.c | 52 i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
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| H A D | intel_fb_pin.c | 70 ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
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| H A D | intel_dpt.c | 271 ret = i915_gem_object_set_cache_level(dpt_obj, I915_CACHE_NONE);
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| H A D | intel_plane_initial.c | 190 I915_CACHE_WT : I915_CACHE_NONE);
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| /linux-master/drivers/gpu/drm/i915/selftests/ |
| H A D | mock_region.c | 80 i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
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| H A D | i915_gem.c | 62 I915_CACHE_NONE),
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| H A D | mock_gem_device.c | 131 [I915_CACHE_NONE] = 0,
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| H A D | i915_gem_gtt.c | 138 obj->pat_index = i915_gem_get_pat_index(i915, I915_CACHE_NONE);
363 I915_CACHE_NONE),
1384 I915_CACHE_NONE),
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| /linux-master/drivers/gpu/drm/i915/gem/selftests/ |
| H A D | huge_gem_object.c | 126 cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE;
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| /linux-master/drivers/gpu/drm/i915/gem/ |
| H A D | i915_gem_domain.c | 37 return !(i915_gem_object_has_cache_level(obj, I915_CACHE_NONE) ||
356 level = I915_CACHE_NONE;
371 level = HAS_WT(i915) ? I915_CACHE_WT : I915_CACHE_NONE;
451 I915_CACHE_WT : I915_CACHE_NONE);
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| H A D | i915_gem_internal.c | 173 cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE;
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| H A D | i915_gem_object_types.h | 134 * @I915_CACHE_NONE:
148 I915_CACHE_NONE = 0, enumerator in enum:i915_cache_level
164 * CPU cache. For such objects I915_CACHE_NONE or I915_CACHE_WT is
194 * fallback to I915_CACHE_NONE. On the CPU side writes through the CPU
442 * surfaces will either be marked as I915_CACHE_NONE or I915_CACHE_WT.
443 * In the case of seeing I915_CACHE_NONE the kernel makes the assumption
464 * Thus for scanout surfaces using I915_CACHE_NONE, on shared LLC
522 * I915_CACHE_NONE objects, under the assumption that this is going to
535 * I915_CACHE_NONE. The only exception is userptr objects, where we
543 * 2. All I915_CACHE_NONE object
[all...] |
| H A D | i915_gem_ttm_move.c | 58 I915_CACHE_NONE;
119 cache_level = I915_CACHE_NONE;
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| H A D | i915_gem_object.c | 161 if (cache_level != I915_CACHE_NONE)
192 if (pat_index != i915_gem_get_pat_index(i915, I915_CACHE_NONE))
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| H A D | i915_gem_stolen.c | 592 I915_CACHE_NONE),
720 cache_level = HAS_LLC(mem->i915) ? I915_CACHE_LLC : I915_CACHE_NONE;
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| /linux-master/drivers/gpu/drm/i915/ |
| H A D | i915_gem.c | 426 I915_CACHE_NONE), 0);
607 I915_CACHE_NONE), 0);
1157 BUILD_BUG_ON(I915_CACHE_NONE != 0 ||
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| H A D | i915_pci.c | 51 [I915_CACHE_NONE] = 0, \
59 [I915_CACHE_NONE] = 3, \
67 [I915_CACHE_NONE] = 2, \
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