Searched refs:FW_BLC_SELF_EN (Results 1 - 5 of 5) sorted by relevance

/linux-master/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c472 if (REG_READ(FW_BLC_SELF) & FW_BLC_SELF_EN) {
475 REG_WRITE(FW_BLC_SELF, (REG_READ(FW_BLC_SELF) & ~FW_BLC_SELF_EN));
535 REG_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
H A Dpsb_intel_reg.h567 #define FW_BLC_SELF_EN (1<<15) macro
/linux-master/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c148 was_enabled = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF) & FW_BLC_SELF_EN;
149 intel_uncore_write(&dev_priv->uncore, FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0);
161 was_enabled = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF) & FW_BLC_SELF_EN;
162 val = enable ? _MASKED_BIT_ENABLE(FW_BLC_SELF_EN) :
163 _MASKED_BIT_DISABLE(FW_BLC_SELF_EN);
3626 wm->cxsr = intel_uncore_read(&dev_priv->uncore, FW_BLC_SELF) & FW_BLC_SELF_EN;
H A Dintel_display_debugfs.c75 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
/linux-master/drivers/gpu/drm/i915/
H A Di915_reg.h464 #define FW_BLC_SELF_EN (1 << 15) /* 945 only */ macro

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