Searched refs:F1 (Results 1 - 14 of 14) sorted by relevance

/linux-master/drivers/pinctrl/renesas/
H A Dpfc-r8a73a4.c231 #define F1(a) a##_MARK macro
240 F1(LCDD0), F3(PDM2_CLK_0), F7(DU0_DR0), IRQ(0), /* Port0 */ enumerator in enum:__anon2472
241 F1(LCDD1), F3(PDM2_DATA_1), F7(DU0_DR19), IRQ(1), enumerator in enum:__anon2472
242 F1(LCDD2), F3(PDM3_CLK_2), F7(DU0_DR2), IRQ(2), enumerator in enum:__anon2472
243 F1(LCDD3), F3(PDM3_DATA_3), F7(DU0_DR3), IRQ(3), enumerator in enum:__anon2472
244 F1(LCDD4), F3(PDM4_CLK_4), F7(DU0_DR4), IRQ(4), enumerator in enum:__anon2472
245 F1(LCDD5), F3(PDM4_DATA_5), F7(DU0_DR5), IRQ(5), enumerator in enum:__anon2472
246 F1(LCDD6), F3(PDM0_OUTCLK_6), F7(DU0_DR6), IRQ(6), enumerator in enum:__anon2472
247 F1(LCDD7), F3(PDM0_OUTDATA_7), F7(DU0_DR7), IRQ(7), enumerator in enum:__anon2472
248 F1(LCDD enumerator in enum:__anon2472
249 F1(LCDD9), F3(PDM1_OUTDATA_9), F7(DU0_DG1), IRQ(9), enumerator in enum:__anon2472
250 F1(LCDD10), F3(FSICCK), F7(DU0_DG2), IRQ(10), /* Port10 */ enumerator in enum:__anon2472
251 F1(LCDD11), F3(FSICISLD), F7(DU0_DG3), IRQ(11), enumerator in enum:__anon2472
252 F1(LCDD12), F3(FSICOMC), F7(DU0_DG4), IRQ(12), enumerator in enum:__anon2472
253 F1(LCDD13), F3(FSICOLR), F4(FSICILR), F7(DU0_DG5), IRQ(13), enumerator in enum:__anon2472
254 F1(LCDD14), F3(FSICOBT), F4(FSICIBT), F7(DU0_DG6), IRQ(14), enumerator in enum:__anon2472
255 F1(LCDD15), F3(FSICOSLD), F7(DU0_DG7), IRQ(15), enumerator in enum:__anon2472
256 F1(LCDD16), F4(TPU1TO1), F7(DU0_DB0), enumerator in enum:__anon2472
257 F1(LCDD17), F4(SF_IRQ_00), F7(DU0_DB1), enumerator in enum:__anon2472
258 F1(LCDD18), F4(SF_IRQ_01), F7(DU0_DB2), enumerator in enum:__anon2472
259 F1(LCDD19), F3(SCIFB3_RTS_19), F7(DU0_DB3), enumerator in enum:__anon2472
260 F1(LCDD20), F3(SCIFB3_CTS_20), F7(DU0_DB4), /* Port20 */ enumerator in enum:__anon2472
261 F1(LCDD21), F3(SCIFB3_TXD_21), F7(DU0_DB5), enumerator in enum:__anon2472
262 F1(LCDD22), F3(SCIFB3_RXD_22), F7(DU0_DB6), enumerator in enum:__anon2472
263 F1(LCDD23), F3(SCIFB3_SCK_23), F7(DU0_DB7), enumerator in enum:__anon2472
264 F1(LCDHSYN), F2(LCDCS), F3(SCIFB1_RTS_24), enumerator in enum:__anon2472
266 F1(LCDVSYN), F3(SCIFB1_CTS_25), F7(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N), enumerator in enum:__anon2472
267 F1(LCDDCK), F2(LCDWR), F3(SCIFB1_TXD_26), F7(DU0_DOTCLKIN), enumerator in enum:__anon2472
268 F1(LCDDISP), F2(LCDRS), F3(SCIFB1_RXD_27), F7(DU0_DOTCLKOUT), enumerator in enum:__anon2472
269 F1(LCDRD_N), F3(SCIFB1_SCK_28), F7(DU0_DOTCLKOUTB), enumerator in enum:__anon2472
270 F1(LCDLCLK), F4(SF_IRQ_02), F7(DU0_DISP_CSYNC_N_DE), enumerator in enum:__anon2472
271 F1(LCDDON), F4(SF_IRQ_03), F7(DU0_ODDF_N_CLAMP), /* Port30 */ enumerator in enum:__anon2472
273 F1(SCIFA0_RTS), F5(SIM0_DET), F7(CSCIF0_RTS), /* Port32 */ enumerator in enum:__anon2472
274 F1(SCIFA0_CTS), F5(SIM1_DET), F7(CSCIF0_CTS), enumerator in enum:__anon2472
275 F1(SCIFA0_SCK), F5(SIM0_PWRON), F7(CSCIF0_SCK), enumerator in enum:__anon2472
276 F1(SCIFA1_RTS), F7(CSCIF1_RTS), enumerator in enum:__anon2472
277 F1(SCIFA1_CTS), F7(CSCIF1_CTS), enumerator in enum:__anon2472
278 F1(SCIFA1_SCK), F7(CSCIF1_SCK), enumerator in enum:__anon2472
279 F1(SCIFB0_RTS), F3(TPU0TO1), F4(SCIFB3_RTS_38), F7(CHSCIF0_HRTS), enumerator in enum:__anon2472
280 F1(SCIFB0_CTS), F3(TPU0TO2), F4(SCIFB3_CTS_39), F7(CHSCIF0_HCTS), enumerator in enum:__anon2472
281 F1(SCIFB0_SCK), F3(TPU0TO3), F4(SCIFB3_SCK_40), enumerator in enum:__anon2472
284 F1(PDM0_DATA), /* Port64 */ enumerator in enum:__anon2472
285 F1(PDM1_DATA), enumerator in enum:__anon2472
286 F1(HSI_RX_WAKE), F2(SCIFB2_CTS_66), F3(MSIOF3_SYNC), F5(GenIO4), enumerator in enum:__anon2472
288 F1(HSI_RX_READY), F2(SCIFB1_TXD_67), F5(GIO_OUT3_67), F7(CHSCIF1_HTX), enumerator in enum:__anon2472
289 F1(HSI_RX_FLAG), F2(SCIFB2_TXD_68), F3(MSIOF3_TXD), F5(GIO_OUT4_68), enumerator in enum:__anon2472
290 F1(HSI_RX_DATA), F2(SCIFB2_RXD_69), F3(MSIOF3_RXD), F5(GIO_OUT5_69), enumerator in enum:__anon2472
291 F1(HSI_TX_FLAG), F2(SCIFB1_RTS_70), F5(GIO_OUT1_70), F6(HSIC_TSTCLK0), enumerator in enum:__anon2472
293 F1(HSI_TX_DATA), F2(SCIFB1_CTS_71), F5(GIO_OUT2_71), F6(HSIC_TSTCLK1), enumerator in enum:__anon2472
295 F1(HSI_TX_WAKE), F2(SCIFB1_RXD_72), F5(GenIO8), F7(CHSCIF1_HRX), enumerator in enum:__anon2472
296 F1(HSI_TX_READY), F2(SCIFB2_RTS_73), F3(MSIOF3_SCK), F5(GIO_OUT0_73), enumerator in enum:__anon2472
297 F1(IRDA_OUT), F1(IRDA_IN), F1(IRDA_FIRSEL), F1(TPU0TO0), enumerator in enum:__anon2472
298 F1(DIGRFEN), F1(GPS_TIMESTAMP), F1(TXP), /* Port80 */ enumerator in enum:__anon2472
299 F1(TXP2), F1(COEX_0), F1(COEX_1), IRQ(19), IRQ(18), /* Port85 */ enumerator in enum:__anon2472
301 F1(KEYIN0), /* Port96 */ enumerator in enum:__anon2472
302 F1(KEYIN1), F1(KEYIN2), F1(KEYIN3), F1(KEYIN4), /* Port100 */ enumerator in enum:__anon2472
303 F1(KEYIN5), F1(KEYIN6), IRQ(41), F1(KEYIN7), IRQ(42), enumerator in enum:__anon2472
307 F1(KEYIN8), F2(KEYOUT8), F4(SF_IRQ_04), IRQ(46), enumerator in enum:__anon2472
308 F1(KEYIN9), F2(KEYOUT9), F4(SF_IRQ_05), IRQ(47), enumerator in enum:__anon2472
309 F1(KEYIN10), F2(KEYOUT10), F4(SF_IRQ_06), IRQ(48), enumerator in enum:__anon2472
310 F1(KEYIN11), F2(KEYOUT11), F4(SF_IRQ_07), IRQ(49), enumerator in enum:__anon2472
311 F1(SCIFA0_TXD), F7(CSCIF0_TX), F1(SCIFA0_RXD), F7(CSCIF0_RX), enumerator in enum:__anon2472
312 F1(SCIFA1_TXD), F7(CSCIF1_TX), F1(SCIFA1_RXD), F7(CSCIF1_RX), enumerator in enum:__anon2472
315 F1(SCIFB0_TXD), F7(CHSCIF0_HTX), enumerator in enum:__anon2472
316 F1(SCIFB0_RXD), F7(CHSCIF0_HRX), F3(ISP_STROBE_124), enumerator in enum:__anon2472
317 F1(STP_ISD_0), F2(PDM4_CLK_125), F3(MSIOF2_TXD), F5(SIM0_VOLTSEL0), enumerator in enum:__anon2472
318 F1(TS_SDEN), F2(MSIOF7_SYNC), F3(STP_ISEN_1), enumerator in enum:__anon2472
319 F1(STP_ISEN_0), F2(PDM1_OUTDATA_128), F3(MSIOF2_SYNC), enumerator in enum:__anon2472
320 F5(SIM1_VOLTSEL1), F1(TS_SPSYNC), F2(MSIOF7_RXD), F3(STP_ISSYNC_1), enumerator in enum:__anon2472
321 F1(STP_ISSYNC_0), F2(PDM4_DATA_130), F3(MSIOF2_RXD), enumerator in enum:__anon2472
323 F1(STP_OPWM_0), F5(SIM1_PWRON), F1(TS_SCK), F2(MSIOF7_SCK), enumerator in enum:__anon2472
324 F3(STP_ISCLK_1), F1(STP_ISCLK_0), F2(PDM1_OUTCLK_133), F3(MSIOF2_SCK), enumerator in enum:__anon2472
325 F5(SIM1_VOLTSEL0), F1(TS_SDAT), F2(MSIOF7_TXD), F3(STP_ISD_1), enumerator in enum:__anon2472
328 F1(MMCD0_0), F1(MMCD0_1), F1(MMCD0_2), F1(MMCD0_3), enumerator in enum:__anon2472
329 F1(MMCD0_4), F1(MMCD0_5), F1(MMCD0_6), /* Port170 */ enumerator in enum:__anon2472
330 F1(MMCD0_7), F1(MMCCMD0), F1(MMCCLK0), F1(MMCRST), enumerator in enum:__anon2472
332 F1(A10), F2(MMCD1_7), IRQ(31), /* Port192 */ enumerator in enum:__anon2472
333 F1(A9), F2(MMCD1_6), IRQ(32), enumerator in enum:__anon2472
334 F1(A8), F2(MMCD1_5), IRQ(33), enumerator in enum:__anon2472
335 F1(A7), F2(MMCD1_4), IRQ(34), enumerator in enum:__anon2472
336 F1(A6), F2(MMCD1_3), IRQ(35), enumerator in enum:__anon2472
337 F1(A5), F2(MMCD1_2), IRQ(36), enumerator in enum:__anon2472
338 F1(A4), F2(MMCD1_1), IRQ(37), enumerator in enum:__anon2472
339 F1(A3), F2(MMCD1_0), IRQ(38), enumerator in enum:__anon2472
340 F1(A2), F2(MMCCMD1), IRQ(39), /* Port200 */ enumerator in enum:__anon2472
341 F1(A1), enumerator in enum:__anon2472
342 F1(A0), F2(BS), enumerator in enum:__anon2472
343 F1(CKO), F2(MMCCLK1), enumerator in enum:__anon2472
344 F1(CS0_N), F5(SIM0_GPO1), enumerator in enum:__anon2472
345 F1(CS2_N), F5(SIM0_GPO2), enumerator in enum:__anon2472
346 F1(CS4_N), F2(VIO_VD), F5(SIM1_GPO0), enumerator in enum:__anon2472
347 F1(D15), F5(GIO_OUT15), enumerator in enum:__anon2472
348 F1(D14), F5(GIO_OUT14), enumerator in enum:__anon2472
349 F1(D13), F5(GIO_OUT13), enumerator in enum:__anon2472
350 F1(D12), F5(GIO_OUT12), /* Port210 */ enumerator in enum:__anon2472
351 F1(D11), F5(WGM_TXP2), enumerator in enum:__anon2472
352 F1(D10), F5(WGM_GPS_TIMEM_ASK_RFCLK), enumerator in enum:__anon2472
353 F1(D9), F2(VIO_D9), F5(GIO_OUT9), enumerator in enum:__anon2472
354 F1(D8), F2(VIO_D8), F5(GIO_OUT8), enumerator in enum:__anon2472
355 F1(D7), F2(VIO_D7), F5(GIO_OUT7), enumerator in enum:__anon2472
356 F1(D6), F2(VIO_D6), F5(GIO_OUT6), enumerator in enum:__anon2472
357 F1(D5), F2(VIO_D5), F5(GIO_OUT5_217), enumerator in enum:__anon2472
358 F1(D4), F2(VIO_D4), F5(GIO_OUT4_218), enumerator in enum:__anon2472
359 F1(D3), F2(VIO_D3), F5(GIO_OUT3_219), enumerator in enum:__anon2472
360 F1(D2), F2(VIO_D2), F5(GIO_OUT2_220), /* Port220 */ enumerator in enum:__anon2472
361 F1(D1), F2(VIO_D1), F5(GIO_OUT1_221), enumerator in enum:__anon2472
362 F1(D0), F2(VIO_D0), F5(GIO_OUT0_222), enumerator in enum:__anon2472
363 F1(RDWR_224), F2(VIO_HD), F5(SIM1_GPO2), enumerator in enum:__anon2472
364 F1(RD_N), F1(WAIT_N), F2(VIO_CLK), F5(SIM1_GPO1), enumerator in enum:__anon2472
365 F1(WE0_N), F2(RDWR_227), enumerator in enum:__anon2472
366 F1(WE1_N), F5(SIM0_GPO0), enumerator in enum:__anon2472
367 F1(PWMO), F2(VIO_CKO1_229), enumerator in enum:__anon2472
368 F1(SLIM_CLK), F2(VIO_CKO4_230), /* Port230 */ enumerator in enum:__anon2472
369 F1(SLIM_DATA), F2(VIO_CKO5_231), F2(VIO_CKO2_232), F4(SF_PORT_0_232), enumerator in enum:__anon2472
371 F1(FSIACK), F2(PDM3_CLK_234), F3(ISP_IRIS1_234), enumerator in enum:__anon2472
372 F1(FSIAISLD), F2(PDM3_DATA_235), enumerator in enum:__anon2472
373 F1(FSIAOMC), F2(PDM0_OUTCLK_236), F3(ISP_IRIS0_236), enumerator in enum:__anon2472
374 F1(FSIAOLR), F2(FSIAILR), F1(FSIAOBT), F2(FSIAIBT), enumerator in enum:__anon2472
375 F1(FSIAOSLD), F2(PDM0_OUTDATA_239), enumerator in enum:__anon2472
376 F1(FSIBISLD), /* Port240 */ enumerator in enum:__anon2472
377 F1(FSIBOLR), F2(FSIBILR), F1(FSIBOMC), F3(ISP_SHUTTER1_242), enumerator in enum:__anon2472
378 F1(FSIBOBT), F2(FSIBIBT), F1(FSIBOSLD), F2(FSIASPDIF), enumerator in enum:__anon2472
379 F1(FSIBCK), F3(ISP_SHUTTER0_245), enumerator in enum:__anon2472
380 F1(ISP_IRIS1_246), F1(ISP_IRIS0_247), F1(ISP_SHUTTER1_248), enumerator in enum:__anon2472
381 F1(ISP_SHUTTER0_249), F1(ISP_STROBE_250), /* Port250 */ enumerator in enum:__anon2472
382 F1(MSIOF0_SYNC), F1(MSIOF0_RXD), F1(MSIOF0_SCK), F1(MSIOF0_SS2), enumerator in enum:__anon2472
383 F3(VIO_CKO3_259), F1(MSIOF0_TXD), /* Port260 */ enumerator in enum:__anon2472
385 F1(MSIOF1_SS2), F4(MSIOF5_SS2), F1(MSIOF1_TXD), F4(MSIOF5_TXD), enumerator in enum:__anon2472
386 F1(MSIOF1_RXD), F4(MSIOF5_RXD), F1(MSIOF1_SS1), F4(MSIOF5_SS1), enumerator in enum:__anon2472
387 F1(MSIOF0_SS1), F1(MSIOF1_SCK), F4(MSIOF5_SCK), enumerator in enum:__anon2472
388 F1(MSIOF1_SYNC), F4(MSIOF5_SYNC), enumerator in enum:__anon2472
389 F1(MSIOF2_SS1), F3(VIO_CKO5_270), /* Port270 */ enumerator in enum:__anon2472
390 F1(MSIOF2_SS2), F3(VIO_CKO2_271), F1(MSIOF3_SS2), F3(VIO_CKO1_272), enumerator in enum:__anon2472
391 F1(MSIOF3_SS1), F3(VIO_CKO4_273), F1(MSIOF4_SS2), F4(TPU1TO0), enumerator in enum:__anon2472
392 F1(IC_DP), F1(SIM0_RST), F1(IC_DM), F1(SIM0_BSICOMP), enumerator in enum:__anon2472
393 F1(SIM0_CLK), F1(SIM0_IO), /* Port280 */ enumerator in enum:__anon2472
394 F1(SIM1_IO), F2(PDM2_DATA_281), F1(SIM1_CLK), F2(PDM2_CLK_282), enumerator in enum:__anon2472
395 F1(SIM1_RST), F1(SDHID1_0), F3(STMDATA0_2), enumerator in enum:__anon2472
396 F1(SDHID1_1), F3(STMDATA1_2), IRQ(51), /* Port290 */ enumerator in enum:__anon2472
397 F1(SDHID1_2), F3(STMDATA2_2), F1(SDHID1_3), F3(STMDATA3_2), enumerator in enum:__anon2472
398 F1(SDHICLK1), F3(STMCLK_2), F1(SDHICMD1), F3(STMSIDI_2), enumerator in enum:__anon2472
399 F1(SDHID2_0), F2(MSIOF4_TXD), F3(SCIFB2_TXD_295), F4(MSIOF6_TXD), enumerator in enum:__anon2472
400 F1(SDHID2_1), F4(MSIOF6_SS2), IRQ(52), enumerator in enum:__anon2472
401 F1(SDHID2_2), F2(MSIOF4_RXD), F3(SCIFB2_RXD_297), F4(MSIOF6_RXD), enumerator in enum:__anon2472
402 F1(SDHID2_3), F2(MSIOF4_SYNC), F3(SCIFB2_CTS_298), F4(MSIOF6_SYNC), enumerator in enum:__anon2472
403 F1(SDHICLK2), F2(MSIOF4_SCK), F3(SCIFB2_SCK_299), F4(MSIOF6_SCK), enumerator in enum:__anon2472
404 F1(SDHICMD2), F2(MSIOF4_SS1), F3(SCIFB2_RTS_300), enumerator in enum:__anon2472
406 F1(SDHICD0), IRQ(50), F1(SDHID0_0), F3(STMDATA0_1), enumerator in enum:__anon2472
407 F1(SDHID0_1), F3(STMDATA1_1), F1(SDHID0_2), F3(STMDATA2_1), enumerator in enum:__anon2472
408 F1(SDHID0_3), F3(STMDATA3_1), F1(SDHICMD0), F3(STMSIDI_1), enumerator in enum:__anon2472
409 F1(SDHIWP0), F1(SDHICLK0), F3(STMCLK_1), IRQ(16), /* Port320 */ enumerator in enum:__anon2472
[all...]
/linux-master/crypto/
H A Dmd5.c32 #define F1(x, y, z) (z ^ (x & (y ^ z))) macro
33 #define F2(x, y, z) F1(z, x, y)
49 MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7);
50 MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12);
51 MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17);
52 MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22);
53 MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7);
54 MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12);
55 MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17);
56 MD5STEP(F1,
[all...]
H A Drmd160.c37 #define F1(x, y, z) (x ^ y ^ z) /* XOR */ macro
68 ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11);
69 ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14);
70 ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15);
71 ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12);
72 ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5);
73 ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8);
74 ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7);
75 ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9);
76 ROUND(cc, dd, ee, aa, bb, F1, K
[all...]
H A Dcast6_generic.c27 #define F1(D, r, m) ((I = ((m) + (D))), (I = rol32(I, (r))), \ macro
96 key[6] ^= F1(key[7], Tr[i % 4][0], Tm[i][0]);
99 key[3] ^= F1(key[4], Tr[i % 4][3], Tm[i][3]);
102 key[0] ^= F1(key[1], Tr[i % 4][6], Tm[i][6]);
156 block[2] ^= F1(block[3], Kr[0], Km[0]);
159 block[3] ^= F1(block[0], Kr[3], Km[3]);
166 block[3] ^= F1(block[0], Kr[3], Km[3]);
169 block[2] ^= F1(block[3], Kr[0], Km[0]);
H A Dcast5_generic.c295 #define F1(D, m, r) ((I = ((m) + (D))), (I = rol32(I, (r))), \ macro
327 t = l; l = r; r = t ^ F1(r, Km[0], Kr[0]);
330 t = l; l = r; r = t ^ F1(r, Km[3], Kr[3]);
333 t = l; l = r; r = t ^ F1(r, Km[6], Kr[6]);
336 t = l; l = r; r = t ^ F1(r, Km[9], Kr[9]);
340 t = l; l = r; r = t ^ F1(r, Km[12], Kr[12]);
343 t = l; l = r; r = t ^ F1(r, Km[15], Kr[15]);
372 t = l; l = r; r = t ^ F1(r, Km[15], Kr[15]);
375 t = l; l = r; r = t ^ F1(r, Km[12], Kr[12]);
379 t = l; l = r; r = t ^ F1(
[all...]
/linux-master/arch/x86/crypto/
H A Dsha1_ssse3_asm.S128 RR F1,A,B,C,D,E,0
129 RR F1,D,E,A,B,C,2
130 RR F1,B,C,D,E,A,4
131 RR F1,E,A,B,C,D,6
132 RR F1,C,D,E,A,B,8
134 RR F1,A,B,C,D,E,10
135 RR F1,D,E,A,B,C,12
136 RR F1,B,C,D,E,A,14
137 RR F1,E,A,B,C,D,16
138 RR F1,
[all...]
/linux-master/drivers/gpu/drm/i915/
H A Dintel_step.h48 func(F1) \
/linux-master/arch/arm/crypto/
H A Dsha1-armv7-neon.S328 _R( _a, _b, _c, _d, _e, F1, 0,
331 _R( _e, _a, _b, _c, _d, F1, 1,
334 _R( _d, _e, _a, _b, _c, F1, 2,
337 _R( _c, _d, _e, _a, _b, F1, 3,
343 _R( _b, _c, _d, _e, _a, F1, 4,
346 _R( _a, _b, _c, _d, _e, F1, 5,
349 _R( _e, _a, _b, _c, _d, F1, 6,
352 _R( _d, _e, _a, _b, _c, F1, 7,
356 _R( _c, _d, _e, _a, _b, F1, 8,
359 _R( _b, _c, _d, _e, _a, F1,
[all...]
/linux-master/drivers/edac/
H A Damd64_edac.h332 struct pci_dev *F1, *F2, *F3; member in struct:amd64_pvt
506 amd64_read_pci_cfg(pvt->F1, DRAM_CONT_LIMIT, &tmp);
516 amd64_read_pci_cfg(pvt->F1, DRAM_CONT_BASE, &tmp);
526 amd64_read_pci_cfg(pvt->F1, DRAM_CONT_BASE, &tmp);
H A Damd64_edac.c107 amd64_read_pci_cfg(pvt->F1, DCT_CFG_SEL, &reg);
110 amd64_write_pci_cfg(pvt->F1, DCT_CFG_SEL, reg);
1675 amd64_read_pci_cfg(pvt->F1, DRAM_LOCAL_NODE_LIM, &tmp);
1690 amd64_read_pci_cfg(pvt->F1, DRAM_LOCAL_NODE_BASE, &tmp);
1731 amd64_read_pci_cfg(pvt->F1, DRAM_BASE_LO + off, &pvt->ranges[range].base.lo);
1732 amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_LO + off, &pvt->ranges[range].lim.lo);
1740 amd64_read_pci_cfg(pvt->F1, DRAM_BASE_HI + off, &pvt->ranges[range].base.hi);
1741 amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_HI + off, &pvt->ranges[range].lim.hi);
2378 amd64_read_pci_cfg(pvt->F1, DRAM_CONT_BASE, &dct_cont_base_reg);
2379 amd64_read_pci_cfg(pvt->F1, DRAM_CONT_LIMI
[all...]
/linux-master/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c1381 #define F1 187 macro
1382 SIG_EXPR_LIST_DECL_SINGLE(F1, GPIOX3, GPIOX3, SIG_DESC_SET(SCUA4, 3));
1383 SIG_EXPR_LIST_DECL_SINGLE(F1, ADC11, ADC11);
1384 PIN_DECL_(F1, SIG_EXPR_LIST_PTR(F1, GPIOX3), SIG_EXPR_LIST_PTR(F1, ADC11));
1385 FUNC_GROUP_DECL(ADC11, F1);
2012 ASPEED_PINCTRL_PIN(F1),
2587 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F1, F1, SCUA
[all...]
/linux-master/arch/sparc/net/
H A Dbpf_jit_comp_32.c32 #define F1(X) OP(X) macro
85 #define CALL F1(1)
H A Dbpf_jit_comp_64.c62 #define F1(X) OP(X) macro
161 #define CALL F1(1)
/linux-master/drivers/pinctrl/
H A Dpinctrl-pic32.c150 PINCTRL_PIN(81, "F1"),
211 "D2", "G8", "F4", "F1", "B9", "B10", "C14", "B5",
231 "D2", "G8", "F4", "D10", "F1", "B9", "B10", "C14",
236 "D2", "G8", "F4", "D10", "F1", "B9", "B10", "C14",
1335 PIC32_PINCTRL_GROUP(81, F1,

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