Searched refs:DSCCLK_DTO_CTRL (Results 1 - 6 of 6) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_dccg.h | 72 SR(DSCCLK_DTO_CTRL),\
187 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK0_DTO_ENABLE, mask_sh),\
188 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK1_DTO_ENABLE, mask_sh),\
189 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK2_DTO_ENABLE, mask_sh),\
190 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK3_DTO_ENABLE, mask_sh),\
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_dccg.c | 363 REG_UPDATE(DSCCLK_DTO_CTRL,
370 REG_UPDATE(DSCCLK_DTO_CTRL,
377 REG_UPDATE(DSCCLK_DTO_CTRL,
385 REG_UPDATE(DSCCLK_DTO_CTRL,
410 REG_UPDATE(DSCCLK_DTO_CTRL,
417 REG_UPDATE(DSCCLK_DTO_CTRL,
424 REG_UPDATE(DSCCLK_DTO_CTRL,
429 REG_UPDATE(DSCCLK_DTO_CTRL,
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| H A D | dcn31_dccg.h | 64 SR(DSCCLK_DTO_CTRL),\
136 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK0_DTO_ENABLE, mask_sh),\
137 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK1_DTO_ENABLE, mask_sh),\
138 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK2_DTO_ENABLE, mask_sh),\
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
| H A D | dcn35_dccg.c | 613 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 1);
619 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 1);
625 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 1);
631 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 1);
649 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 0);
655 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 0);
661 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 0);
667 REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 0);
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| H A D | dcn35_dccg.h | 78 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK0_EN, mask_sh),\
79 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK1_EN, mask_sh),\
80 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK2_EN, mask_sh),\
81 DCCG_SF(DSCCLK_DTO_CTRL, DSCCLK3_EN, mask_sh),\
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dccg.h | 372 uint32_t DSCCLK_DTO_CTRL; member in struct:dccg_registers
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