Searched refs:DSCCLK0_DTO_PARAM (Results 1 - 6 of 6) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_dccg.h | 61 SR(DSCCLK0_DTO_PARAM),\
130 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
131 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
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| H A D | dcn31_dccg.c | 365 REG_UPDATE_2(DSCCLK0_DTO_PARAM,
407 REG_UPDATE_2(DSCCLK0_DTO_PARAM,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_dccg.h | 68 SR(DSCCLK0_DTO_PARAM),\
147 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
148 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
| H A D | dcn35_dccg.h | 82 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_PHASE, mask_sh),\
83 DCCG_SF(DSCCLK0_DTO_PARAM, DSCCLK0_DTO_MODULO, mask_sh),\
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| H A D | dcn35_dccg.c | 610 REG_UPDATE_2(DSCCLK0_DTO_PARAM,
650 REG_UPDATE_2(DSCCLK0_DTO_PARAM,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dccg.h | 373 uint32_t DSCCLK0_DTO_PARAM; member in struct:dccg_registers
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