| /linux-master/drivers/gpu/drm/amd/display/dc/dcn303/ |
| H A D | dcn303_dccg.h | 37 SR(DISPCLK_FREQ_CHANGE_CNTL),\
51 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_STEP_DELAY, mask_sh),\
52 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_STEP_SIZE, mask_sh),\
53 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_FREQ_RAMP_DONE, mask_sh),\
54 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_MAX_ERRDET_CYCLES, mask_sh),\
55 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_RESET, mask_sh),\
56 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_STATE, mask_sh),\
57 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_OVR_EN, mask_sh),\
58 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_CHG_FWD_CORR_DISABLE, mask_sh),\
|
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dccg.h | 40 SR(DISPCLK_FREQ_CHANGE_CNTL)
73 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_STEP_DELAY, mask_sh),\
74 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_STEP_SIZE, mask_sh),\
75 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_FREQ_RAMP_DONE, mask_sh),\
76 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_MAX_ERRDET_CYCLES, mask_sh),\
77 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_RESET, mask_sh),\
78 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_STATE, mask_sh),\
79 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_OVR_EN, mask_sh),\
80 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_CHG_FWD_CORR_DISABLE, mask_sh),\
131 type DISPCLK_FREQ_CHANGE_CNTL;\
354 uint32_t DISPCLK_FREQ_CHANGE_CNTL; member in struct:dccg_registers
[all...] |
| H A D | dcn20_dccg.c | 104 REG_UPDATE(DISPCLK_FREQ_CHANGE_CNTL,
|
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| H A D | dce_hwseq.h | 266 SR(DISPCLK_FREQ_CHANGE_CNTL), \
330 SR(DISPCLK_FREQ_CHANGE_CNTL), \
377 SR(DISPCLK_FREQ_CHANGE_CNTL), \
401 SR(DISPCLK_FREQ_CHANGE_CNTL), \
438 SR(DISPCLK_FREQ_CHANGE_CNTL), \
490 SR(DISPCLK_FREQ_CHANGE_CNTL), \
550 SR(DISPCLK_FREQ_CHANGE_CNTL), \
640 uint32_t DISPCLK_FREQ_CHANGE_CNTL; member in struct:dce_hwseq_registers
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.h | 183 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 706 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 697 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 694 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 700 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 549 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 546 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 369 REG_WRITE(DISPCLK_FREQ_CHANGE_CNTL, 0xe01003c);
|