| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | df_v1_7.c | 49 tmp = RREG32_SOC15(DF, 0, mmFabricConfigAccessControl);
51 WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);
53 WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,
61 tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
82 /* Put DF on broadcast mode */
86 tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
89 WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);
91 tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
94 WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);
107 tmp = RREG32_SOC15(DF,
[all...] |
| H A D | df_v4_3.c | 34 hw_assert_msklo = RREG32_SOC15(DF, 0,
36 hw_assert_mskhi = RREG32_SOC15(DF, 0,
53 dev_warn(adev->dev, "DF poison setting is inconsistent(%d:%d:%d:%d)!\n",
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| H A D | df_v3_6.c | 227 tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DfGlobalCtrl);
268 tmp = RREG32_SOC15(DF, 0, mmFabricConfigAccessControl);
270 WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);
272 WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,
281 tmp = RREG32_SOC15(DF, 0, mmDF_GCM_AON0_DramMegaBaseAddress0);
285 tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DramBaseAddress0);
310 /* Put DF on broadcast mode */
314 tmp = RREG32_SOC15(DF, 0,
318 WREG32_SOC15(DF, 0,
321 tmp = RREG32_SOC15(DF,
[all...] |
| /linux-master/arch/x86/kernel/ |
| H A D | fred.c | 14 * #DF is the highest level because a #DF means "something went wrong
18 * on #DF, which means it should be at the highest level.
49 wrmsrl(MSR_IA32_FRED_RSP3, __this_cpu_ist_top_va(DF));
|
| H A D | dumpstack_64.c | 23 [ ESTACK_DF ] = "#DF",
86 EPAGERANGE(DF),
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| /linux-master/drivers/scsi/ |
| H A D | aha1542.h | 15 #define DF BIT(2) /* Data In Port Full */ macro
18 #define STATMASK (STST | DIAGF | INIT | IDLE | CDF | DF | INVDCMD)
|
| H A D | aha1542.c | 133 if (!wait_mask(STATUS(base), DF, DF, 0, timeout))
225 if (!wait_mask(STATUS(sh->io_port), STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF, 0))
240 if (!wait_mask(STATUS(sh->io_port), DF, DF, 0, 0))
245 /* Reading port should reset DF */
246 if (inb(STATUS(sh->io_port)) & DF)
550 if (i & DF) {
655 if (i & DF) {
940 STATMASK, IDLE, STST | DIAGF | INVDCMD | DF | CD
[all...] |
| /linux-master/fs/reiserfs/ |
| H A D | procfs.c | 58 #define DF( x ) D2C( rs -> s_v1.x ) macro
251 DF(s_blocksize),
252 DF(s_oid_maxsize),
253 DF(s_oid_cursize),
254 DF(s_umount_state),
256 DF(s_fs_state),
261 DF(s_tree_height),
262 DF(s_bmap_nr),
263 DF(s_version), flags, (flags & reiserfs_attrs_cleared)
264 ? "attrs_cleared" : "", DF(s_reserved_for_journa
[all...] |
| /linux-master/arch/m68k/kernel/ |
| H A D | traps.c | 384 if (ssw & DF)
396 if ((ssw & DF)
405 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
413 if (ssw & DF) {
434 if (!(ssw & (FC | FB)) && !(ssw & DF))
441 if (ssw & DF) {
515 if (ssw & DF)
525 if (ssw & DF) {
632 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
992 if (ssw & DF)
[all...] |
| /linux-master/arch/m68k/include/asm/ |
| H A D | traps.h | 111 #define DF (0x0100) macro
|
| /linux-master/arch/x86/mm/ |
| H A D | cpu_entry_area.c | 154 cea_map_stack(DF);
|
| H A D | fault.c | 674 call_on_stack(__this_cpu_ist_top_va(DF) - sizeof(void*),
|
| /linux-master/net/ipv4/ |
| H A D | ip_output.c | 262 * - Forwarding of a TCP GRO skb, when DF flag is not set.
645 unsigned int ll_rs, unsigned int mtu, bool DF,
650 state->DF = DF;
735 if (state->DF)
1423 /* DF bit is set when we want to see DF on outgoing frames.
644 ip_frag_init(struct sk_buff *skb, unsigned int hlen, unsigned int ll_rs, unsigned int mtu, bool DF, struct ip_frag_state *state) argument
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| /linux-master/include/net/ |
| H A D | ip.h | 195 bool DF; member in struct:ip_frag_state
206 unsigned int mtu, bool DF, struct ip_frag_state *state);
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| /linux-master/arch/x86/kvm/ |
| H A D | trace.h | 366 EXS(DF), EXS(TS), EXS(NP), EXS(SS), EXS(GP), EXS(PF), \
|
| /linux-master/arch/x86/kernel/cpu/ |
| H A D | common.c | 2142 tss->x86_tss.ist[IST_INDEX_DF] = __this_cpu_ist_top_va(DF);
|
| /linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | vega10_hwmgr.c | 932 data->mem_channels = (RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0) &
|