Searched refs:DEFINE_RES_MEM (Results 1 - 25 of 79) sorted by relevance

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/linux-master/arch/arm/mach-s3c/
H A Ddev-uart-s3c64xx.c28 [0] = DEFINE_RES_MEM(S3C_PA_UART0, SZ_256),
33 [0] = DEFINE_RES_MEM(S3C_PA_UART1, SZ_256),
38 [0] = DEFINE_RES_MEM(S3C_PA_UART2, SZ_256),
43 [0] = DEFINE_RES_MEM(S3C_PA_UART3, SZ_256),
H A Ddevs.c56 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
84 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
114 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
146 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
176 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
207 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
242 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
273 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
299 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
319 [0] = DEFINE_RES_MEM(S3C_PA_USBHOS
[all...]
H A Ddev-audio-s3c64xx.c50 [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS0, SZ_256),
69 [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS1, SZ_256),
/linux-master/drivers/mfd/
H A Dsun6i-prcm.c23 DEFINE_RES_MEM(0x0, 4)
27 DEFINE_RES_MEM(0xc, 4)
31 DEFINE_RES_MEM(0x28, 4)
35 DEFINE_RES_MEM(0x54, 4)
39 DEFINE_RES_MEM(0xb0, 4)
43 DEFINE_RES_MEM(SUN8I_CODEC_ANALOG_BASE, SUN8I_CODEC_ANALOG_SIZE),
H A Dmt6397-core.c47 DEFINE_RES_MEM(MT6323_RTC_BASE, MT6323_RTC_SIZE),
52 DEFINE_RES_MEM(MT6357_RTC_BASE, MT6357_RTC_SIZE),
57 DEFINE_RES_MEM(MT6331_RTC_BASE, MT6331_RTC_SIZE),
62 DEFINE_RES_MEM(MT6358_RTC_BASE, MT6358_RTC_SIZE),
67 DEFINE_RES_MEM(MT6397_RTC_BASE, MT6397_RTC_SIZE),
108 DEFINE_RES_MEM(MT6323_PWRC_BASE, MT6323_PWRC_SIZE),
H A Dioc3.c159 DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uarta),
165 DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uartb),
214 DEFINE_RES_MEM(offsetof(struct ioc3, serio),
243 DEFINE_RES_MEM(offsetof(struct ioc3, eth),
245 DEFINE_RES_MEM(offsetof(struct ioc3, ssram),
251 DEFINE_RES_MEM(offsetof(struct ioc3, mcr),
295 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV0, M48T35_REG_SIZE)
327 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV1, 1),
328 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV2, 1),
360 DEFINE_RES_MEM(offseto
[all...]
H A Dmxs-lradc.c56 DEFINE_RES_MEM(0x0, 0x0),
66 DEFINE_RES_MEM(0x0, 0x0),
73 DEFINE_RES_MEM(0x0, 0x0),
87 DEFINE_RES_MEM(0x0, 0x0),
/linux-master/arch/m68k/virt/
H A Dplatform.c14 DEFINE_RES_MEM(virt_bi_data.virtio.mmio + id * 0x200, 0x200),
25 DEFINE_RES_MEM(virt_bi_data.tty.mmio, 1),
30 DEFINE_RES_MEM(virt_bi_data.rtc.mmio + 0x1000, 0x1000),
/linux-master/arch/arm/mach-sa1100/
H A Dgeneric.c119 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
137 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
149 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
161 [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
162 [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
195 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
213 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
254 DEFINE_RES_MEM(0x90010000, 0x40),
267 DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
300 struct resource wdt_res = DEFINE_RES_MEM(
[all...]
H A Dh3xxx.c80 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
137 [0] = DEFINE_RES_MEM(H3600_EGPIO_PHYS, 0x4),
203 DEFINE_RES_MEM(0x80010000, SZ_4K),
204 DEFINE_RES_MEM(0x80020000, SZ_4K),
/linux-master/arch/sh/kernel/cpu/sh2/
H A Dsetup-sh7619.c67 DEFINE_RES_MEM(0xf8400000, 0x100),
87 DEFINE_RES_MEM(0xf8410000, 0x100),
107 DEFINE_RES_MEM(0xf8420000, 0x100),
154 DEFINE_RES_MEM(0xf84a0070, 0x10),
/linux-master/arch/arm/mach-rpc/
H A Driscpc.c103 DEFINE_RES_MEM(0x03400000, 0x00200000),
118 DEFINE_RES_MEM(0x03200000, 0x10000),
168 DEFINE_RES_MEM(0x030107c0, 0x20),
169 DEFINE_RES_MEM(0x03010fd8, 0x04),
/linux-master/arch/arm/mach-ep93xx/
H A Dcore.c143 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
195 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
234 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
295 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
383 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
454 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
465 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
533 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
552 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
581 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BAS
[all...]
H A Dts72xx.c179 DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
180 DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
197 DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
198 DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
364 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7770.c22 DEFINE_RES_MEM(0xff923000, 0x100),
42 DEFINE_RES_MEM(0xff924000, 0x100),
62 DEFINE_RES_MEM(0xff925000, 0x100),
82 DEFINE_RES_MEM(0xff926000, 0x100),
102 DEFINE_RES_MEM(0xff927000, 0x100),
122 DEFINE_RES_MEM(0xff928000, 0x100),
142 DEFINE_RES_MEM(0xff929000, 0x100),
162 DEFINE_RES_MEM(0xff92a000, 0x100),
182 DEFINE_RES_MEM(0xff92b000, 0x100),
202 DEFINE_RES_MEM(
[all...]
H A Dsetup-sh7723.c30 DEFINE_RES_MEM(0xffe00000, 0x100),
51 DEFINE_RES_MEM(0xffe10000, 0x100),
72 DEFINE_RES_MEM(0xffe20000, 0x100),
92 DEFINE_RES_MEM(0xa4e30000, 0x100),
112 DEFINE_RES_MEM(0xa4e40000, 0x100),
132 DEFINE_RES_MEM(0xa4e50000, 0x100),
235 DEFINE_RES_MEM(0x044a0000, 0x70),
254 DEFINE_RES_MEM(0xffd80000, 0x2c),
275 DEFINE_RES_MEM(0xffd90000, 0x2c),
/linux-master/arch/sh/kernel/cpu/sh2a/
H A Dsetup-sh7201.c184 DEFINE_RES_MEM(0xfffe8000, 0x100),
204 DEFINE_RES_MEM(0xfffe8800, 0x100),
224 DEFINE_RES_MEM(0xfffe9000, 0x100),
244 DEFINE_RES_MEM(0xfffe9800, 0x100),
264 DEFINE_RES_MEM(0xfffea000, 0x100),
284 DEFINE_RES_MEM(0xfffea800, 0x100),
304 DEFINE_RES_MEM(0xfffeb000, 0x100),
324 DEFINE_RES_MEM(0xfffeb800, 0x100),
359 DEFINE_RES_MEM(0xfffe4000, 0x400),
H A Dsetup-sh7206.c140 DEFINE_RES_MEM(0xfffe8000, 0x100),
160 DEFINE_RES_MEM(0xfffe8800, 0x100),
180 DEFINE_RES_MEM(0xfffe9000, 0x100),
200 DEFINE_RES_MEM(0xfffe9800, 0x100),
219 DEFINE_RES_MEM(0xfffec000, 0x10),
235 DEFINE_RES_MEM(0xfffe4000, 0x400),
H A Dsetup-sh7269.c255 DEFINE_RES_MEM(0xe8007000, 0x100),
279 DEFINE_RES_MEM(0xe8007800, 0x100),
303 DEFINE_RES_MEM(0xe8008000, 0x100),
327 DEFINE_RES_MEM(0xe8008800, 0x100),
351 DEFINE_RES_MEM(0xe8009000, 0x100),
375 DEFINE_RES_MEM(0xe8009800, 0x100),
399 DEFINE_RES_MEM(0xe800a000, 0x100),
423 DEFINE_RES_MEM(0xe800a800, 0x100),
445 DEFINE_RES_MEM(0xfffec000, 0x10),
461 DEFINE_RES_MEM(
[all...]
H A Dsetup-sh7264.c233 DEFINE_RES_MEM(0xfffe8000, 0x100),
257 DEFINE_RES_MEM(0xfffe8800, 0x100),
281 DEFINE_RES_MEM(0xfffe9000, 0x100),
305 DEFINE_RES_MEM(0xfffe9800, 0x100),
329 DEFINE_RES_MEM(0xfffea000, 0x100),
353 DEFINE_RES_MEM(0xfffea800, 0x100),
377 DEFINE_RES_MEM(0xfffeb000, 0x100),
401 DEFINE_RES_MEM(0xfffeb800, 0x100),
423 DEFINE_RES_MEM(0xfffec000, 0x10),
439 DEFINE_RES_MEM(
[all...]
/linux-master/arch/arm/mach-clps711x/
H A Dboard-dt.c42 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + HALT, SZ_128);
/linux-master/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7720.c59 DEFINE_RES_MEM(0xa4430000, 0x100),
80 DEFINE_RES_MEM(0xa4438000, 0x100),
154 DEFINE_RES_MEM(0x044a0000, 0x60),
173 DEFINE_RES_MEM(0xa412fe90, 0x28),
H A Dsetup-sh770x.c115 DEFINE_RES_MEM(0xfffffe80, 0x10),
138 DEFINE_RES_MEM(0xa4000150, 0x10),
160 DEFINE_RES_MEM(0xa4000140, 0x10),
180 DEFINE_RES_MEM(0xfffffe90, 0x2c),
/linux-master/arch/m68k/q40/
H A Dconfig.c283 DEFINE_RES_MEM(q40_isa_io_base + PCIDE_BASE1 * 4, 0x38),
284 DEFINE_RES_MEM(q40_isa_io_base + (PCIDE_BASE1 + PCIDE_CTL) * 4, 2),
291 DEFINE_RES_MEM(q40_isa_io_base + PCIDE_BASE2 * 4, 0x38),
292 DEFINE_RES_MEM(q40_isa_io_base + (PCIDE_BASE2 + PCIDE_CTL) * 4, 2),
/linux-master/arch/sh/kernel/cpu/sh4/
H A Dsetup-sh7760.c135 DEFINE_RES_MEM(0xfe600000, 0x100),
159 DEFINE_RES_MEM(0xfe610000, 0x100),
183 DEFINE_RES_MEM(0xfe620000, 0x100),
212 DEFINE_RES_MEM(0xfe480000, 0x10),
233 DEFINE_RES_MEM(0xffd80000, 0x30),

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