Searched refs:D5 (Results 1 - 25 of 29) sorted by relevance

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/linux-master/arch/s390/crypto/
H A Dchacha-s390.S468 #define D5 %v23 define
512 VAF D5,D2,T3 # K[3]+5
537 VX D5,D5,A5
543 VERLLF D5,D5,16
550 VAF C5,C5,D5
575 VX D5,D5,A5
581 VERLLF D5,D
[all...]
/linux-master/arch/m68k/fpsp040/
H A Dsrem_mod.S117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y|
133 subl %d6,%d3 | ...(D3,D4,D5) is normalized
142 movel %d5,%d7 | ...a copy of D5
147 orl %d7,%d4 | ...(D3,D4,D5) normalized
152 addil #0x00003FFE,%d3 | ...(D3,D4,D5) normalized
226 |..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
H A Ddecbin.S11 | Saves and Modifies: D2-D5
/linux-master/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g4.c113 #define D5 7 macro
114 SIG_EXPR_LIST_DECL_SINGLE(D5, MDIO2, MDIO2, MDIO2_DESC);
115 SIG_EXPR_LIST_DECL_SINGLE(D5, TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7));
116 PIN_DECL_2(D5, GPIOA7, MDIO2, TIMER8);
118 FUNC_GROUP_DECL(TIMER8, D5);
119 FUNC_GROUP_DECL(MDIO2, A3, D5);
1999 ASPEED_PINCTRL_PIN(D5),
2442 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, D6, D5, SCU8C, 16),
2443 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, D6, D5, SCU8C, 16),
H A Dpinctrl-aspeed-g5.c1211 #define D5 162 macro
1212 SIG_EXPR_LIST_DECL_SINGLE(D5, GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10));
1213 SIG_EXPR_LIST_DECL_SINGLE(D5, RMII2DASH0, RMII2, RMII2_DESC);
1214 SIG_EXPR_LIST_DECL_SINGLE(D5, RGMII2TXD2, RGMII2);
1215 PIN_DECL_(D5, SIG_EXPR_LIST_PTR(D5, GPIOU2), SIG_EXPR_LIST_PTR(D5, RMII2DASH0),
1216 SIG_EXPR_LIST_PTR(D5, RGMII2TXD2));
1312 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1989 ASPEED_PINCTRL_PIN(D5),
[all...]
H A Dpinctrl-aspeed-g6.c1312 #define D5 210 macro
1313 SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1315 SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1317 PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1376 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1377 FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1803 ASPEED_PINCTRL_PIN(D5),
/linux-master/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c210 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
594 PINMUX_IPSR_GPSR(IP5_27_24, D5),
H A Dpfc-r8a77990.c80 #define GPSR0_5 F_(D5, IP6_11_8)
266 #define IP6_11_8 FM(D5) FM(RX3_A) FM(HRX3_B) F_(0, 0) F_(0, 0) FM(DU_DR5) FM(VI4_DATA4_B) F_(0, 0) FM(LCDOUT21) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
872 PINMUX_IPSR_GPSR(IP6_11_8, D5),
5177 [31] = RCAR_GP_PIN(0, 5), /* D5 */
H A Dpfc-sh7734.c744 PINMUX_IPSR_GPSR(IP2_4_3, D5),
1421 GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A),
H A Dpfc-r8a77980.c244 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_DS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
672 PINMUX_IPSR_GPSR(IP5_27_24, D5),
H A Dpfc-r8a77951.c91 #define GPSR0_5 F_(D5, IP6_3_0)
304 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
954 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5715 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
5978 [15] = RCAR_GP_PIN(0, 5), /* D5 */
H A Dpfc-r8a77965.c96 #define GPSR0_5 F_(D5, IP6_3_0)
309 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
960 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5911 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
6171 [15] = RCAR_GP_PIN(0, 5), /* D5 */
H A Dpfc-r8a7796.c96 #define GPSR0_5 F_(D5, IP6_3_0)
309 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
958 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5670 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
5930 [15] = RCAR_GP_PIN(0, 5), /* D5 */
H A Dpfc-r8a73a4.c357 F1(D5), F2(VIO_D5), F5(GIO_OUT5_217),
H A Dpfc-sh7264.c1298 GPIO_FN(D5),
H A Dpfc-r8a7792.c362 PINMUX_SINGLE(D5),
2706 [ 5] = RCAR_GP_PIN(2, 5), /* D5 */
H A Dpfc-r8a779a0.c398 #define IP0SR2_19_16 FM(GP2_04) F_(0, 0) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) FM(D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
956 PINMUX_IPSR_MSEL(IP0SR2_19_16, D5, SEL_I2C1_0),
H A Dpfc-r8a77470.c608 PINMUX_IPSR_GPSR(IP1_31_28, D5),
3375 [27] = RCAR_GP_PIN(1, 5), /* D5 */
H A Dpfc-sh7269.c1736 GPIO_FN(D5),
H A Dpfc-sh7757.c1658 GPIO_FN(D5),
H A Dpfc-sh7724.c1403 GPIO_FN(D5),
H A Dpfc-r8a7779.c68 PIN_NOGP_CFG(D5, "D5", fn, SH_PFC_PIN_CFG_PULL_UP), \
4163 [21] = PIN_D5, /* D5 */
H A Dpfc-r8a7778.c689 PINMUX_IPSR_NOGP(IP2_23, D5),
/linux-master/arch/m68k/ifpsp060/src/
H A Dfplsp.S8392 mov.l 8(%a0),%d5 # (D4,D5) is (Hi_X,Lo_X)
8405 add.l %d6,%d2 # (D3,D4,D5) is normalized
8422 mov.l %d5,%d7 # a copy of D5
8427 or.l %d7,%d4 # (D3,D4,D5) normalized
9440 mov.l SRC_LO(%a0),%d5 # (D3,D4,D5) is |Y|
9456 sub.l %d6,%d3 # (D3,D4,D5) is normalized
9465 mov.l %d5,%d7 # a copy of D5
9470 or.l %d7,%d4 # (D3,D4,D5) normalized
9475 add.l &0x00003FFE,%d3 # (D3,D4,D5) normalized
9549 #..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
[all...]
/linux-master/drivers/pinctrl/
H A Dpinctrl-pic32.c129 PINCTRL_PIN(53, "D5"),
226 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
250 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
262 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
267 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
1003 PIC32_PINCTRL_GROUP(53, D5,

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