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84ba5131 |
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15-Sep-2023 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions Add pins, groups, and functions for the Local Bus State Controller (LBSC) on the Renesas R-Car M1A (R8A7778) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/347b9f7627871b45aec04a3351d50219d4d260fe.1694768311.git.geert+renesas@glider.be
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0256b6ae |
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08-Mar-2023 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Annotate sentinels in tables It does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel. Hence drop all such commas. Add comments to clarify the purpose of the empty elements. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/845f1d8285dd44522af1b0f429d4c6bd4759eb9e.1678272180.git.geert+renesas@glider.be
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0f1dd62c |
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13-Apr-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7778: Use shorthands for reserved fields Replace the full descriptions of reserved register fields by shorthands with a negative field width, and merge adjacent reserved fields. This reduces kernel size by 142 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1af5225c81ac871a461f7d824619275e2e0ed8df.1649865241.git.geert+renesas@glider.be
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ef41ea37 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7778: Share SDHI pin group data Pin group sdhi0_data1 is a subset of sdhi0_data4. Pin groups sdhi[12]_data1_[ab] are subsets of sdhi[12]_data4_[ab]. This reduces kernel size by 40 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/997df5b8a01657ede685c0869d73e4d6b71dce26.1640269757.git.geert+renesas@glider.be
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e56ca224 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7778: Share MMC pin group data Pin groups mmc_data[14] are subsets of mmc_data8. This reduces kernel size by 40 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/d3bf7dfda2952a0265171f82024931d490d9178a.1640269757.git.geert+renesas@glider.be
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cf04bbe5 |
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30-Apr-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7778: Remove unused PORT_GP_PUP_1() macro The last user was removed in commit dd1f760bffcee2c5 ("pinctrl: sh-pfc: r8a7778: Use common PORT_GP_CFG_27() macro"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/129147ac57f5e931cc7108db0a6483b803a1b8f4.1619785375.git.geert+renesas@glider.be
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4b6e6c19 |
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03-Mar-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Move R-Car bias helpers to sh_pfc.h The Renesas Pin Function Controller driver uses two header files: - sh_pfc.h, for use by both core code and SoC-specific drivers, - core.h, for internal use by the core code only. Hence move the R-Car bias helper declarations from core.h to sh_pfc.h, and drop the inclusion of core.h from SoC-specific drivers that no longer need it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20210303132619.3938128-3-geert+renesas@glider.be
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a3ee0a24 |
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28-Oct-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7778: Use common R-Car bias handling Currently, the rcar_pinmux_[gs]et_bias() helpers handle only SoCs that have separate LSI Pin Pull-Enable (PUEN) and Pull-Up/Down Control (PUD) registers, like R-Car Gen3 and RZ/G2. Update the function to handle SoCs that have only LSI Pin Pull-Up Control Register (PUPR), like R-Car Gen1/Gen2 and RZ/G1. Reduce code duplication by converting the R-Car M1A pin control driver to use the common handler. Note that this changes behavior in case the (invalid!) option "bias-pull-down" is used in an R-Car M1A DTS: before, it was ignored silently; after this change, it is considered the same as "bias-pull-up". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-8-geert+renesas@glider.be
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2d341cc3 |
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28-Oct-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7778: Use physical addresses for PUPR regs The handling of the LSI Pin Pull-Up Control Registers (PUPR) on R-Car M1A uses register offsets instead of register physical addresses. This is different from the handling on other R-Car parts. Convert the bias handling from register offsets to physical addresses. This increases uniformity, and prepares for consolidation of the bias handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-7-geert+renesas@glider.be
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077365a9 |
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09-Sep-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: Rename sh-pfc to renesas The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "sh-pfc" no longer reflects its contents, as the directory now contains pin control drivers for Renesas SuperH, ARM32, and ARM64 SoCs. Hence rename the subdirectory from drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, and the related Kconfig symbol from PINCTRL_SH_PFC to PINCTRL_RENESAS. Rename the git branch in MAINTAINERS, too, for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be
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